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HV: add memmap param for hvlog in sos cmdline

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Reserve memory for hv sbuf to avoid its possible overwriting on kernel memory.

For apl-up2, move hv_log address to 0x5de00000 to avoid possible conflict with
HV_RAM which start from 0x5e000000;

For nuc6cayh, move HV_RAM_START to 0x20000000 to avoid possible conflict with
hv_log which start from 0x1fe00000;

Tracked-On: #3533

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
This commit is contained in:
Victor Sun 2019-09-15 12:42:47 +08:00 committed by wenlingz
parent 12fc8e9c8d
commit 398137990e
7 changed files with 14 additions and 8 deletions
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1
hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h
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@ -19,6 +19,7 @@
#ifndef CONFIG_RELEASE #ifndef CONFIG_RELEASE
#define BOOTARG_DEBUG "hvlog=2M@0x6de00000 " \ #define BOOTARG_DEBUG "hvlog=2M@0x6de00000 " \
"memmap=0x200000$0x6de00000 " \
"memmap=0x400000$0x6da00000 " \ "memmap=0x400000$0x6da00000 " \
"ramoops.mem_address=0x6da00000 " \ "ramoops.mem_address=0x6da00000 " \
"ramoops.mem_size=0x400000 " \ "ramoops.mem_size=0x400000 " \

7
hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
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@ -18,9 +18,10 @@
#define SOS_COM2_IRQ 3U #define SOS_COM2_IRQ 3U
#ifndef CONFIG_RELEASE #ifndef CONFIG_RELEASE
#define BOOTARG_DEBUG "hvlog=2M@0x6de00000 " \ #define BOOTARG_DEBUG "hvlog=2M@0x5de00000 " \
"memmap=0x400000$0x6da00000 " \ "memmap=0x200000$0x5de00000 " \
"ramoops.mem_address=0x6da00000 " \ "memmap=0x400000$0x5da00000 " \
"ramoops.mem_address=0x5da00000 " \
"ramoops.mem_size=0x400000 " \ "ramoops.mem_size=0x400000 " \
"ramoops.console_size=0x200000 " \ "ramoops.console_size=0x200000 " \
"reboot_panic=p,w " "reboot_panic=p,w "

3
hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h
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@ -17,7 +17,8 @@
#define SOS_COM2_IRQ 3U #define SOS_COM2_IRQ 3U
#ifndef CONFIG_RELEASE #ifndef CONFIG_RELEASE
#define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000" #define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000 " \
"memmap=0x200000$0x1fe00000 "
#else #else
#define SOS_BOOTARGS_DIFF "" #define SOS_BOOTARGS_DIFF ""
#endif #endif

3
hypervisor/arch/x86/configs/generic/misc_cfg.h
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@ -18,7 +18,8 @@
#define SOS_COM2_IRQ 3U #define SOS_COM2_IRQ 3U
#ifndef CONFIG_RELEASE #ifndef CONFIG_RELEASE
#define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000" #define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000 " \
"memmap=0x200000$0x1fe00000 "
#else #else
#define SOS_BOOTARGS_DIFF "" #define SOS_BOOTARGS_DIFF ""
#endif #endif

2
hypervisor/arch/x86/configs/nuc6cayh.config
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@ -4,4 +4,4 @@ CONFIG_BOARD="nuc6cayh"
# enable HSUART at PCI 0:18.0 by soldering Tx/Rx wires from M.2 connector; # enable HSUART at PCI 0:18.0 by soldering Tx/Rx wires from M.2 connector;
CONFIG_SERIAL_PCI=y CONFIG_SERIAL_PCI=y
CONFIG_SERIAL_PCI_BDF="0:18.0" CONFIG_SERIAL_PCI_BDF="0:18.0"
CONFIG_HV_RAM_START=0x12200000 CONFIG_HV_RAM_START=0x20000000

3
hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h
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@ -17,7 +17,8 @@
#define SOS_COM2_IRQ 3U #define SOS_COM2_IRQ 3U
#ifndef CONFIG_RELEASE #ifndef CONFIG_RELEASE
#define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000" #define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000 " \
"memmap=0x200000$0x1fe00000 "
#else #else
#define SOS_BOOTARGS_DIFF "" #define SOS_BOOTARGS_DIFF ""
#endif #endif

3
hypervisor/arch/x86/configs/nuc7i7dnb/misc_cfg.h
View File

@ -18,7 +18,8 @@
#define SOS_COM2_IRQ 3U #define SOS_COM2_IRQ 3U
#ifndef CONFIG_RELEASE #ifndef CONFIG_RELEASE
#define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000" #define SOS_BOOTARGS_DIFF "hvlog=2M@0x1FE00000 " \
"memmap=0x200000$0x1fe00000 "
#else #else
#define SOS_BOOTARGS_DIFF "" #define SOS_BOOTARGS_DIFF ""
#endif #endif