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hv: multi-arch reconstruct spinlock library

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Extract common interface to include/lib/spinlock.h, and invoke the
variant implementation of arch.
Refine assemble macro code in case that ASSEMBLER defined.

Tracked-On: #8803
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
This commit is contained in:
Haoyu Tang
2025-09-09 10:51:02 +08:00
committed by acrnsi-robot
parent 052a58d87d
commit 3a74e62ec4
21 changed files with 113 additions and 80 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
hypervisor/acpi_parser/dmar_parse.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -7,7 +7,7 @@
#include <types.h> #include <types.h>
#include <logmsg.h> #include <logmsg.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/cpu_caps.h> #include <asm/cpu_caps.h>
#include <pci.h> #include <pci.h>
#include <asm/vtd.h> #include <asm/vtd.h>

4
hypervisor/arch/x86/guest/ucode.c
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@@ -1,12 +1,12 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <types.h> #include <types.h>
#include <errno.h> #include <errno.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/cpu.h> #include <asm/cpu.h>
#include <asm/msr.h> #include <asm/msr.h>
#include <asm/cpuid.h> #include <asm/cpuid.h>

4
hypervisor/arch/x86/guest/vmcall.c
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@@ -1,12 +1,12 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <types.h> #include <types.h>
#include <errno.h> #include <errno.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/guest/vcpu.h> #include <asm/guest/vcpu.h>
#include <asm/guest/vm.h> #include <asm/guest/vm.h>
#include <asm/guest/virq.h> #include <asm/guest/virq.h>

4
hypervisor/arch/x86/ioapic.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -8,7 +8,7 @@
#include <errno.h> #include <errno.h>
#include <cpu.h> #include <cpu.h>
#include <irq.h> #include <irq.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/ioapic.h> #include <asm/ioapic.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>

4
hypervisor/arch/x86/irq.c
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@@ -1,12 +1,12 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <types.h> #include <types.h>
#include <asm/lib/bits.h> #include <asm/lib/bits.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <per_cpu.h> #include <per_cpu.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/irq.h> #include <asm/irq.h>

4
hypervisor/arch/x86/vtd.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -9,7 +9,7 @@
#include <types.h> #include <types.h>
#include <errno.h> #include <errno.h>
#include <asm/lib/bits.h> #include <asm/lib/bits.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/cpu_caps.h> #include <asm/cpu_caps.h>
#include <irq.h> #include <irq.h>
#include <asm/irq.h> #include <asm/irq.h>

4
hypervisor/debug/logmsg.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -9,7 +9,7 @@
#include <per_cpu.h> #include <per_cpu.h>
#include <asm/lib/atomic.h> #include <asm/lib/atomic.h>
#include <sprintf.h> #include <sprintf.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <npk_log.h> #include <npk_log.h>
#include <logmsg.h> #include <logmsg.h>
#include <ticks.h> #include <ticks.h>

4
hypervisor/debug/shell_priv.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -7,7 +7,7 @@
#ifndef SHELL_PRIV_H #ifndef SHELL_PRIV_H
#define SHELL_PRIV_H #define SHELL_PRIV_H
#include <asm/lib/spinlock.h> #include <spinlock.h>
#define SHELL_CMD_MAX_LEN 100U #define SHELL_CMD_MAX_LEN 100U
#define SHELL_STRING_MAX_LEN (PAGE_SIZE << 2U) #define SHELL_STRING_MAX_LEN (PAGE_SIZE << 2U)

4
hypervisor/debug/uart16550.c
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@@ -1,11 +1,11 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <types.h> #include <types.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <pci.h> #include <pci.h>
#include <uart16550.h> #include <uart16550.h>
#include <asm/io.h> #include <asm/io.h>

4
hypervisor/dm/vpic.c
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@@ -1,6 +1,6 @@
/*- /*-
* Copyright (c) 2014 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com> * Copyright (c) 2014 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
* Copyright (c) 2017-2022 Intel Corporation. * Copyright (c) 2017-2025 Intel Corporation.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@@ -30,7 +30,7 @@
#include <asm/guest/virq.h> #include <asm/guest/virq.h>
#include <irq.h> #include <irq.h>
#include <asm/guest/assign.h> #include <asm/guest/assign.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <logmsg.h> #include <logmsg.h>
#include <asm/ioapic.h> #include <asm/ioapic.h>
#include <asm/irq.h> #include <asm/irq.h>

4
hypervisor/hw/pci.c
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@@ -2,7 +2,7 @@
* Copyright (c) 1997, Stefan Esser <se@freebsd.org> * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
* Copyright (c) 2000, Michael Smith <msmith@freebsd.org> * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
* Copyright (c) 2011 NetApp, Inc. * Copyright (c) 2011 NetApp, Inc.
* Copyright (c) 2018-2022 Intel Corporation. * Copyright (c) 2018-2025 Intel Corporation.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@@ -31,7 +31,7 @@
* *
*/ */
#include <types.h> #include <types.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/mmu.h> #include <asm/mmu.h>

4
hypervisor/include/arch/x86/asm/guest/vm.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -14,7 +14,7 @@
#ifndef ASSEMBLER #ifndef ASSEMBLER
#include <asm/lib/bits.h> #include <asm/lib/bits.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/guest/vcpu.h> #include <asm/guest/vcpu.h>
#include <vioapic.h> #include <vioapic.h>

57
hypervisor/include/arch/x86/asm/lib/spinlock.h
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@@ -1,33 +1,20 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef SPINLOCK_H #ifndef X86_LIB_SPINLOCK_H
#define SPINLOCK_H #define X86_LIB_SPINLOCK_H
#ifndef ASSEMBLER #ifndef ASSEMBLER
#include <types.h>
#include <rtl.h>
/** The architecture dependent spinlock type. */ /** The architecture dependent spinlock type. */
typedef struct _spinlock { typedef struct _arch_spinlock {
uint32_t head; uint32_t head;
uint32_t tail; uint32_t tail;
} arch_spinlock_t;
} spinlock_t; static inline void arch_spinlock_obtain(arch_spinlock_t *lock)
/* Function prototypes */
static inline void spinlock_init(spinlock_t *lock)
{ {
(void)memset(lock, 0U, sizeof(spinlock_t));
}
static inline void spinlock_obtain(spinlock_t *lock)
{
/* The lock function atomically increments and exchanges the head /* The lock function atomically increments and exchanges the head
* counter of the queue. If the old head of the queue is equal to the * counter of the queue. If the old head of the queue is equal to the
* tail, we have locked the spinlock. Otherwise we have to wait. * tail, we have locked the spinlock. Otherwise we have to wait.
@@ -48,7 +35,7 @@ static inline void spinlock_obtain(spinlock_t *lock)
: "cc", "memory", "eax"); : "cc", "memory", "eax");
} }
static inline void spinlock_release(spinlock_t *lock) static inline void arch_spinlock_release(arch_spinlock_t *lock)
{ {
/* Increment tail of queue */ /* Increment tail of queue */
asm volatile (" lock incl %[tail]\n" asm volatile (" lock incl %[tail]\n"
@@ -58,16 +45,14 @@ static inline void spinlock_release(spinlock_t *lock)
} }
#else /* ASSEMBLER */ #else /* ASSEMBLER */
/** The offset of the head element. */ /** The offset of the head element. */
#define SYNC_SPINLOCK_HEAD_OFFSET 0 #define SYNC_SPINLOCK_HEAD_OFFSET 0
/** The offset of the tail element. */ /** The offset of the tail element. */
#define SYNC_SPINLOCK_TAIL_OFFSET 4 #define SYNC_SPINLOCK_TAIL_OFFSET 4
.macro spinlock_obtain lock .macro arch_spinlock_obtain lock_arg
movl $1, % eax movl $1, % eax
lea \lock, % rbx lea \lock_arg, % rbx
lock xaddl % eax, SYNC_SPINLOCK_HEAD_OFFSET(%rbx) lock xaddl % eax, SYNC_SPINLOCK_HEAD_OFFSET(%rbx)
cmpl % eax, SYNC_SPINLOCK_TAIL_OFFSET(%rbx) cmpl % eax, SYNC_SPINLOCK_TAIL_OFFSET(%rbx)
jz 1f jz 1f
@@ -77,27 +62,13 @@ static inline void spinlock_release(spinlock_t *lock)
jnz 2b jnz 2b
1 : 1 :
.endm .endm
#define arch_spinlock_obtain(x) arch_spinlock_obtain lock_arg = (x)
#define spinlock_obtain(x) spinlock_obtain lock = (x) .macro arch_spinlock_release lock_arg
lea \lock_arg, % rbx
.macro spinlock_release lock
lea \lock, % rbx
lock incl SYNC_SPINLOCK_TAIL_OFFSET(%rbx) lock incl SYNC_SPINLOCK_TAIL_OFFSET(%rbx)
.endm .endm
#define arch_spinlock_release(x) arch_spinlock_release lock_arg = (x)
#define spinlock_release(x) spinlock_release lock = (x)
#endif /* ASSEMBLER */ #endif /* ASSEMBLER */
#endif /* X86_LIB_SPINLOCK_H */
#define spinlock_irqsave_obtain(lock, p_rflags) \
do { \
CPU_INT_ALL_DISABLE(p_rflags); \
spinlock_obtain(lock); \
} while (0)
#define spinlock_irqrestore_release(lock, rflags) \
do { \
spinlock_release(lock); \
CPU_INT_ALL_RESTORE(rflags); \
} while (0)
#endif /* SPINLOCK_H */

4
hypervisor/include/arch/x86/asm/page.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2024 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -7,7 +7,7 @@
#ifndef PAGE_H #ifndef PAGE_H
#define PAGE_H #define PAGE_H
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <board_info.h> #include <board_info.h>
/** /**

7
hypervisor/include/common/event.h
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@@ -1,6 +1,11 @@
/*
* Copyright (C) 2025 Intel Corporation.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef EVENT_H #ifndef EVENT_H
#define EVENT_H #define EVENT_H
#include <asm/lib/spinlock.h> #include <spinlock.h>
struct sched_event { struct sched_event {
spinlock_t lock; spinlock_t lock;

4
hypervisor/include/common/irq.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2021-2022 Intel Corporation. * Copyright (C) 2021-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -8,7 +8,7 @@
#define COMMON_IRQ_H #define COMMON_IRQ_H
#include <lib/util.h> #include <lib/util.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
/** /**
* @file common/irq.h * @file common/irq.h

4
hypervisor/include/common/ptdev.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@@ -7,7 +7,7 @@
#ifndef PTDEV_H #ifndef PTDEV_H
#define PTDEV_H #define PTDEV_H
#include <list.h> #include <list.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <timer.h> #include <timer.h>
#include <vacpi.h> #include <vacpi.h>

4
hypervisor/include/common/schedule.h
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@@ -1,12 +1,12 @@
/* /*
* Copyright (C) 2018-2022 Intel Corporation. * Copyright (C) 2018-2025 Intel Corporation.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef SCHEDULE_H #ifndef SCHEDULE_H
#define SCHEDULE_H #define SCHEDULE_H
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <lib/list.h> #include <lib/list.h>
#include <timer.h> #include <timer.h>

4
hypervisor/include/dm/vpci.h
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@@ -1,6 +1,6 @@
/*- /*-
* Copyright (c) 2011 NetApp, Inc. * Copyright (c) 2011 NetApp, Inc.
* Copyright (c) 2018-2022 Intel Corporation. * Copyright (c) 2018-2025 Intel Corporation.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@@ -29,7 +29,7 @@
#ifndef VPCI_H_ #ifndef VPCI_H_
#define VPCI_H_ #define VPCI_H_
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <lib/util.h> #include <lib/util.h>
#include <pci.h> #include <pci.h>
#include <list.h> #include <list.h>

4
hypervisor/include/dm/vuart.h
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@@ -1,6 +1,6 @@
/*- /*-
* Copyright (c) 2013 Neel Natu <neel@freebsd.org> * Copyright (c) 2013 Neel Natu <neel@freebsd.org>
* Copyright (c) 2018-2024 Intel Corporation. * Copyright (c) 2018-2025 Intel Corporation.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@@ -29,7 +29,7 @@
#ifndef VUART_H #ifndef VUART_H
#define VUART_H #define VUART_H
#include <types.h> #include <types.h>
#include <asm/lib/spinlock.h> #include <spinlock.h>
#include <asm/vm_config.h> #include <asm/vm_config.h>
/** /**

57
hypervisor/include/lib/spinlock.h Normal file
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@@ -0,0 +1,57 @@
/*
* Copyright (C) 2025 Intel Corporation.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SPINLOCK_H
#define SPINLOCK_H
#ifndef ASSEMBLER
#include <types.h>
#include <rtl.h>
#include <asm/cpu.h>
#include <asm/lib/spinlock.h>
/* The common spinlock type */
typedef arch_spinlock_t spinlock_t;
/* The mandatory functions should be implemented by arch spinlock library */
static inline void arch_spinlock_obtain(arch_spinlock_t *lock);
static inline void arch_spinlock_release(arch_spinlock_t *lock);
/* Function prototypes */
static inline void spinlock_init(spinlock_t *lock)
{
(void)memset(lock, 0U, sizeof(spinlock_t));
}
static inline void spinlock_irqsave_obtain(spinlock_t *lock, uint64_t * flags)
{
CPU_INT_ALL_DISABLE(flags);
arch_spinlock_obtain(lock);
}
static inline void spinlock_irqrestore_release(spinlock_t *lock, uint64_t flags)
{
arch_spinlock_release(lock);
CPU_INT_ALL_RESTORE(flags);
}
static inline void spinlock_obtain(spinlock_t *lock)
{
return arch_spinlock_obtain(lock);
}
static inline void spinlock_release(spinlock_t *lock)
{
return arch_spinlock_release(lock);
}
#else /* ASSEMBLER */
#include <asm/lib/spinlock.h>
#define spinlock_obtain arch_spinlock_obtain
#define spinlock_release arch_spinlock_release
#endif /* ASSEMBLER */
#endif /* SPINLOCK_H */