HV: Add vuart port base address/IRQ Kconfig options

Adding Kconfig option to define the vuart port base address/IRQ.
By default, use 0x3F8/IRQ4. For MRB, use 0x3E8/IRQ6.
We are experiencing problems on NUC after changing from 0x3F8/IRQ4
to 0x3E8/IRQ6.

Tracked-On: #1817
Change-Id: Ie407e51a7bc25ac0bb4c61453c969f1466fa33ca
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
This commit is contained in:
dongshen
2018-11-15 11:14:41 -08:00
committed by lijinxia
parent b32e689a64
commit 3b87e7c67f
4 changed files with 25 additions and 10 deletions

View File

@@ -165,6 +165,20 @@ config SERIAL_PIO_BASE
The base address of the UART ports. This is logically 16-bit but used
as a 64-bit integer.
config COM_BASE
hex "Base address of the vuart port"
depends on !RELEASE
default 0x3f8
help
Base address of the vuart port.
config COM_IRQ
hex "IRQ of the vuart port"
depends on !RELEASE
default 4
help
IRQ of the vuart port.
config MALLOC_ALIGN
int "Block size in the heap for malloc()"
range 8 32

View File

@@ -43,15 +43,17 @@ is_entry_active(const struct ptdev_remapping_info *entry)
return atomic_load32(&entry->active) == ACTIVE_FLAG;
}
#ifdef HV_DEBUG
static bool ptdev_hv_owned_intx(const struct acrn_vm *vm, const union source_id *virt_sid)
{
/* vm0 vuart pin is owned by hypervisor under debug version */
if (is_vm0(vm) && (virt_sid->intx_id.pin == COM1_IRQ)) {
if (is_vm0(vm) && (virt_sid->intx_id.pin == CONFIG_COM_IRQ)) {
return true;
} else {
return false;
}
}
#endif
static uint64_t calculate_logical_dest_mask(uint64_t pdmask)
{
@@ -637,9 +639,11 @@ int ptdev_intx_pin_remap(struct acrn_vm *vm, uint8_t virt_pin,
*/
/* no remap for hypervisor owned intx */
#ifdef HV_DEBUG
if (ptdev_hv_owned_intx(vm, &virt_sid)) {
goto END;
}
#endif
/* query if we have virt to phys mapping */
spinlock_obtain(&ptdev_lock);