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acrn-config: specify valid ACPI reset register address and value in FADT table

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So that guest VM can recognize and use ACPI reset register to reboot

No need to specify "Flags (decoded below)" in FADT template, iasl will
calculate and fill in this flag for us

Tracked-On: #5411
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
This commit is contained in:
dongshen 2020-10-22 13:29:59 -07:00 committed by wenlingz
parent e5edc7c090
commit 3cf476dc1d
1 changed files with 8 additions and 8 deletions
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16
misc/vm_configs/acpi/template/facp.asl
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@ -61,18 +61,18 @@
PCIe ASPM Not Supported (V4) : 0 PCIe ASPM Not Supported (V4) : 0
CMOS RTC Not Present (V5) : 0 CMOS RTC Not Present (V5) : 0
[0001] Reserved : 00 [0001] Reserved : 00
[0004] Flags (decoded below) : 00001125 [0004] Flags (decoded below) : 00000000
WBINVD instruction is operational (V1) : 1 WBINVD instruction is operational (V1) : 1
WBINVD flushes all caches (V1) : 0 WBINVD flushes all caches (V1) : 0
All CPUs support C1 (V1) : 1 All CPUs support C1 (V1) : 1
C2 works on MP system (V1) : 0 C2 works on MP system (V1) : 0
Control Method Power Button (V1) : 0 Control Method Power Button (V1) : 0
Control Method Sleep Button (V1) : 1 Control Method Sleep Button (V1) : 0
RTC wake not in fixed reg space (V1) : 0 RTC wake not in fixed reg space (V1) : 0
RTC can wake system from S4 (V1) : 0 RTC can wake system from S4 (V1) : 0
32-bit PM Timer (V1) : 1 32-bit PM Timer (V1) : 1
Docking Supported (V1) : 0 Docking Supported (V1) : 0
Reset Register Supported (V2) : 0 Reset Register Supported (V2) : 1
Sealed Case (V3) : 0 Sealed Case (V3) : 0
Headless - No Video (V3) : 1 Headless - No Video (V3) : 1
Use native instr after SLP_TYPx (V3) : 0 Use native instr after SLP_TYPx (V3) : 0
@ -86,13 +86,13 @@ Use APIC Physical Destination Mode (V4) : 0
Low Power S0 Idle (V5) : 0 Low Power S0 Idle (V5) : 0
[0012] Reset Register : [Generic Address Structure] [0012] Reset Register : [Generic Address Structure]
[0001] Space ID : 00 [SystemMemory] [0001] Space ID : 01 [SystemIO]
[0001] Bit Width : 00 [0001] Bit Width : 08
[0001] Bit Offset : 00 [0001] Bit Offset : 00
[0001] Encoded Access Width : 00 [Undefined/Legacy] [0001] Encoded Access Width : 01 [Byte Access:8]
[0008] Address : 0000000000000000 [0008] Address : 0000000000000CF9
[0001] Value to cause reset : 00 [0001] Value to cause reset : 0E
[0002] ARM Flags (decoded below) : 0000 [0002] ARM Flags (decoded below) : 0000
PSCI Compliant : 0 PSCI Compliant : 0
Must use HVC for PSCI : 0 Must use HVC for PSCI : 0