From 3f9b0d53f59a531c6fd370bbceca336b182e5adb Mon Sep 17 00:00:00 2001 From: Yonghua Huang Date: Thu, 5 Jul 2018 17:29:51 +0800 Subject: [PATCH] HV: rename functions in cpu.c - rename 'cpu_set_logical_id()' to 'set_current_cpu_id()' - rename 'cpu_find_logical_id()' to 'get_cpu_id_from_lapic_id()' - some clean up in cpu.c & trampolines.s Signed-off-by: Yonghua Huang --- hypervisor/arch/x86/cpu.c | 27 ++++++++++++--------------- hypervisor/arch/x86/trampoline.S | 1 - hypervisor/include/arch/x86/cpu.h | 2 -- 3 files changed, 12 insertions(+), 18 deletions(-) diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c index 685996182..a73d1181a 100644 --- a/hypervisor/arch/x86/cpu.c +++ b/hypervisor/arch/x86/cpu.c @@ -52,9 +52,9 @@ static void bsp_boot_post(void); static void cpu_secondary_post(void); static void vapic_cap_detect(void); static void cpu_xsave_init(void); -static void cpu_set_logical_id(uint16_t pcpu_id); +static void set_current_cpu_id(uint16_t pcpu_id); static void print_hv_banner(void); -int cpu_find_logical_id(uint8_t lapic_id); +static int get_cpu_id_from_lapic_id(uint8_t lapic_id); static void pcpu_sync_sleep(unsigned long *sync, int mask_bit); int ibrs_type; static uint64_t __attribute__((__section__(".bss_noinit"))) start_tsc; @@ -261,11 +261,11 @@ uint16_t __attribute__((weak)) parse_madt(uint8_t *lapic_id_base) return ARRAY_SIZE(lapic_id); } -static int init_phy_cpu_storage(void) +static void init_phy_cpu_storage(void) { int i; uint16_t pcpu_num=0U; - int bsp_cpu_id; + uint16_t bsp_cpu_id; uint8_t bsp_lapic_id = 0; uint8_t *lapic_id_base; @@ -287,10 +287,8 @@ static int init_phy_cpu_storage(void) bsp_lapic_id = get_cur_lapic_id(); - bsp_cpu_id = cpu_find_logical_id(bsp_lapic_id); - ASSERT(bsp_cpu_id >= 0, "fail to get phy cpu id"); - - return bsp_cpu_id; + bsp_cpu_id = get_cpu_id_from_lapic_id(bsp_lapic_id); + ASSERT(bsp_cpu_id != INVALID_CPU_ID, "fail to get phy cpu id"); } static void cpu_set_current_state(uint16_t pcpu_id, enum cpu_state state) @@ -303,7 +301,7 @@ static void cpu_set_current_state(uint16_t pcpu_id, enum cpu_state state) up_count++; /* Save this CPU's logical ID to the TSC AUX MSR */ - cpu_set_logical_id(pcpu_id); + set_current_cpu_id(pcpu_id); } /* If cpu is dead, decrement CPU up count */ @@ -579,8 +577,7 @@ void cpu_secondary_init(void) /* Find the logical ID of this CPU given the LAPIC ID * and Set state for this CPU to initializing */ - cpu_set_current_state(cpu_find_logical_id - (get_cur_lapic_id()), + cpu_set_current_state(get_cpu_id_from_lapic_id(get_cur_lapic_id()), CPU_STATE_INITIALIZING); __bitmap_set(get_cpu_id(), &pcpu_active_bitmap); @@ -631,16 +628,16 @@ static void cpu_secondary_post(void) cpu_dead(get_cpu_id()); } -int cpu_find_logical_id(uint8_t lapic_id) +static int get_cpu_id_from_lapic_id(uint8_t lapic_id) { - int i; + uint16_t i; for (i = 0; i < phys_cpu_num; i++) { if (per_cpu(lapic_id, i) == lapic_id) return i; } - return -1; + return INVALID_CPU_ID; } static void update_trampoline_code_refs(uint64_t dest_pa) @@ -815,7 +812,7 @@ void cpu_dead(uint16_t pcpu_id) } while (halt != 0); } -static void cpu_set_logical_id(uint16_t pcpu_id) +static void set_current_cpu_id(uint16_t pcpu_id) { /* Write TSC AUX register */ msr_write(MSR_IA32_TSC_AUX, (uint64_t) pcpu_id); diff --git a/hypervisor/arch/x86/trampoline.S b/hypervisor/arch/x86/trampoline.S index 438fa7401..0543c3721 100644 --- a/hypervisor/arch/x86/trampoline.S +++ b/hypervisor/arch/x86/trampoline.S @@ -38,7 +38,6 @@ */ .extern cpu_secondary_init - .extern cpu_logical_id .extern _ld_bss_end .extern HOST_GDTR diff --git a/hypervisor/include/arch/x86/cpu.h b/hypervisor/include/arch/x86/cpu.h index 36498e295..5c2a20f78 100644 --- a/hypervisor/include/arch/x86/cpu.h +++ b/hypervisor/include/arch/x86/cpu.h @@ -146,8 +146,6 @@ #ifndef ASSEMBLER -int cpu_find_logical_id(uint8_t lapic_id); - /**********************************/ /* EXTERNAL VARIABLES */ /**********************************/