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hv: vlapic: remove TPR set/get API

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Since we always enable "Use TPR shadow", so operate on TPR will not
trigger VM exit. So remove these APIs.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Li, Fei1 2019-03-15 00:10:57 +08:00 committed by Eddie Dong
parent 4a683ed10e
commit 40168e73ee
3 changed files with 0 additions and 73 deletions
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18
hypervisor/arch/x86/guest/virtual_cr.c
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@ -417,24 +417,6 @@ int32_t cr_access_vmexit_handler(struct acrn_vcpu *vcpu)
/* mov to cr4 */
vcpu_set_cr4(vcpu, reg);
break;
case 0x08UL:
/* mov to cr8 */
/* According to SDM 6.15 "Exception and interrupt Reference":
*
* set reserved bit in CR8 causes GP to guest
*/
if ((reg & ~0xFUL) != 0UL) {
pr_dbg("Invalid cr8 write operation from guest");
vcpu_inject_gp(vcpu, 0U);
break;
}
vlapic_set_cr8(vcpu_vlapic(vcpu), reg);
break;
case 0x18UL:
/* mov from cr8 */
reg = vlapic_get_cr8(vcpu_vlapic(vcpu));
vcpu_set_gpreg(vcpu, idx, reg);
break;
default:
ASSERT(false, "Unhandled CR access");
ret = -EINVAL;

51
hypervisor/arch/x86/guest/vlapic.c
View File

@ -1181,51 +1181,6 @@ vlapic_calc_dest_lapic_pt(struct acrn_vm *vm, uint64_t *dmask, uint32_t dest, bo
}
}
static void
vlapic_set_tpr(struct acrn_vlapic *vlapic, uint32_t val)
{
struct lapic_regs *lapic = &(vlapic->apic_page);
if (lapic->tpr.v != val) {
dev_dbg(ACRN_DBG_LAPIC,
"vlapic TPR changed from %#x to %#x", lapic->tpr, val);
lapic->tpr.v = val;
vlapic_update_ppr(vlapic);
}
}
static uint32_t
vlapic_get_tpr(const struct acrn_vlapic *vlapic)
{
const struct lapic_regs *lapic = &(vlapic->apic_page);
return lapic->tpr.v;
}
void
vlapic_set_cr8(struct acrn_vlapic *vlapic, uint64_t val)
{
uint32_t tpr;
if ((val & ~0xfUL) != 0U) {
struct acrn_vcpu *vcpu = vlapic->vcpu;
vcpu_inject_gp(vcpu, 0U);
} else {
/* It is safe to narrow val as the higher 60 bits are 0s. */
tpr = (uint32_t)val << 4U;
vlapic_set_tpr(vlapic, tpr);
}
}
uint64_t
vlapic_get_cr8(const struct acrn_vlapic *vlapic)
{
uint32_t tpr;
tpr = vlapic_get_tpr(vlapic);
return ((uint64_t)tpr >> 4UL);
}
static void
vlapic_process_init_sipi(struct acrn_vcpu* target_vcpu, uint32_t mode,
uint32_t icr_low, uint16_t vcpu_id)
@ -1523,9 +1478,6 @@ vlapic_read(struct acrn_vlapic *vlapic, uint32_t offset_arg, uint64_t *data)
case APIC_OFFSET_VER:
*data = lapic->version.v;
break;
case APIC_OFFSET_TPR:
*data = vlapic_get_tpr(vlapic);
break;
case APIC_OFFSET_APR:
*data = lapic->apr.v;
break;
@ -1644,9 +1596,6 @@ vlapic_write(struct acrn_vlapic *vlapic, uint32_t offset, uint64_t data)
case APIC_OFFSET_ID:
/* Force APIC ID as read only */
break;
case APIC_OFFSET_TPR:
vlapic_set_tpr(vlapic, data32 & 0xffU);
break;
case APIC_OFFSET_EOI:
vlapic_process_eoi(vlapic);
break;

4
hypervisor/include/arch/x86/guest/vlapic.h
View File

@ -111,10 +111,6 @@ struct acrn_vlapic {
} __aligned(PAGE_SIZE);
/* APIC write handlers */
void vlapic_set_cr8(struct acrn_vlapic *vlapic, uint64_t val);
uint64_t vlapic_get_cr8(const struct acrn_vlapic *vlapic);
/**
* @brief virtual LAPIC
*