mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-08-04 01:41:08 +00:00
HV: pm: cleanup for misra integral type violations
The patch fixes integral type related violations on HV pm part. Signed-off-by: Victor Sun <victor.sun@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
parent
202bc541b6
commit
401ffd1e39
@ -36,7 +36,7 @@ static void vm_setup_cpu_px(struct vm *vm)
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uint32_t px_data_size;
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uint32_t px_data_size;
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vm->pm.px_cnt = 0U;
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vm->pm.px_cnt = 0U;
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(void)memset(vm->pm.px_data, 0,
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(void)memset(vm->pm.px_data, 0U,
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MAX_PSTATE * sizeof(struct cpu_px_data));
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MAX_PSTATE * sizeof(struct cpu_px_data));
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if ((boot_cpu_data.state_info.px_cnt == 0U)
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if ((boot_cpu_data.state_info.px_cnt == 0U)
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@ -49,7 +49,7 @@ static void vm_setup_cpu_px(struct vm *vm)
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vm->pm.px_cnt = boot_cpu_data.state_info.px_cnt;
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vm->pm.px_cnt = boot_cpu_data.state_info.px_cnt;
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px_data_size = vm->pm.px_cnt * sizeof(struct cpu_px_data);
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px_data_size = ((uint32_t)vm->pm.px_cnt) * sizeof(struct cpu_px_data);
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(void)memcpy_s(vm->pm.px_data, px_data_size,
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(void)memcpy_s(vm->pm.px_data, px_data_size,
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boot_cpu_data.state_info.px_data, px_data_size);
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boot_cpu_data.state_info.px_data, px_data_size);
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@ -61,7 +61,7 @@ static void vm_setup_cpu_cx(struct vm *vm)
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uint32_t cx_data_size;
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uint32_t cx_data_size;
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vm->pm.cx_cnt = 0U;
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vm->pm.cx_cnt = 0U;
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(void)memset(vm->pm.cx_data, 0,
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(void)memset(vm->pm.cx_data, 0U,
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MAX_CSTATE * sizeof(struct cpu_cx_data));
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MAX_CSTATE * sizeof(struct cpu_cx_data));
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if ((boot_cpu_data.state_info.cx_cnt == 0U)
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if ((boot_cpu_data.state_info.cx_cnt == 0U)
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@ -74,7 +74,7 @@ static void vm_setup_cpu_cx(struct vm *vm)
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vm->pm.cx_cnt = boot_cpu_data.state_info.cx_cnt;
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vm->pm.cx_cnt = boot_cpu_data.state_info.cx_cnt;
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cx_data_size = vm->pm.cx_cnt * sizeof(struct cpu_cx_data);
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cx_data_size = ((uint32_t)vm->pm.cx_cnt) * sizeof(struct cpu_cx_data);
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/* please note pm.cx_data[0] is a empty space holder,
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/* please note pm.cx_data[0] is a empty space holder,
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* pm.cx_data[1...MAX_CX_ENTRY] would be used to store cx entry datas.
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* pm.cx_data[1...MAX_CX_ENTRY] would be used to store cx entry datas.
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@ -88,13 +88,13 @@ static inline void init_cx_port(struct vm *vm)
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{
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{
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uint8_t cx_idx;
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uint8_t cx_idx;
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for (cx_idx = 2; cx_idx <= vm->pm.cx_cnt; cx_idx++) {
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for (cx_idx = 2U; cx_idx <= vm->pm.cx_cnt; cx_idx++) {
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struct cpu_cx_data *cx_data = vm->pm.cx_data + cx_idx;
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struct cpu_cx_data *cx_data = vm->pm.cx_data + cx_idx;
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if (cx_data->cx_reg.space_id == SPACE_SYSTEM_IO) {
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if (cx_data->cx_reg.space_id == SPACE_SYSTEM_IO) {
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uint16_t port = (uint16_t)cx_data->cx_reg.address;
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uint16_t port = (uint16_t)cx_data->cx_reg.address;
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allow_guest_io_access(vm, port, 1);
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allow_guest_io_access(vm, port, 1U);
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}
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}
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}
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}
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}
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}
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@ -124,14 +124,14 @@ int vm_load_pm_s_state(struct vm *vm)
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}
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}
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}
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}
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static inline uint16_t s3_enabled(uint16_t pm1_cnt)
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static inline uint32_t s3_enabled(uint32_t pm1_cnt)
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{
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{
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return pm1_cnt & (1 << BIT_SLP_EN);
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return pm1_cnt & (1U << BIT_SLP_EN);
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}
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}
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static inline uint8_t get_slp_typx(uint16_t pm1_cnt)
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static inline uint8_t get_slp_typx(uint32_t pm1_cnt)
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{
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{
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return (pm1_cnt & 0x1fff) >> BIT_SLP_TYPx;
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return (uint8_t)((pm1_cnt & 0x1fffU) >> BIT_SLP_TYPx);
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}
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}
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static uint32_t pm1ab_io_read(__unused struct vm_io_handler *hdlr,
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static uint32_t pm1ab_io_read(__unused struct vm_io_handler *hdlr,
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@ -166,7 +166,7 @@ static void pm1ab_io_write(__unused struct vm_io_handler *hdlr,
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if (vm->pm.sx_state_data->pm1b_cnt.address) {
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if (vm->pm.sx_state_data->pm1b_cnt.address) {
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pm1a_cnt_ready = v;
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pm1a_cnt_ready = v;
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} else {
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} else {
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enter_s3(vm, v, 0);
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enter_s3(vm, v, 0U);
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}
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}
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return;
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return;
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}
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}
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@ -201,7 +201,7 @@ void register_gas_io_handler(struct vm *vm, struct acpi_generic_address *gas)
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return;
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return;
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gas_io.flags = IO_ATTR_RW,
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gas_io.flags = IO_ATTR_RW,
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gas_io.base = gas->address,
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gas_io.base = (uint16_t)gas->address,
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gas_io.len = io_len[gas->access_size];
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gas_io.len = io_len[gas->access_size];
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register_io_emulation_handler(vm, &gas_io,
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register_io_emulation_handler(vm, &gas_io,
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@ -213,8 +213,10 @@ void register_gas_io_handler(struct vm *vm, struct acpi_generic_address *gas)
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void register_pm1ab_handler(struct vm *vm)
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void register_pm1ab_handler(struct vm *vm)
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{
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{
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register_gas_io_handler(vm, &vm->pm.sx_state_data->pm1a_evt);
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struct pm_s_state_data *sx_data = vm->pm.sx_state_data;
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register_gas_io_handler(vm, &vm->pm.sx_state_data->pm1b_evt);
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register_gas_io_handler(vm, &vm->pm.sx_state_data->pm1a_cnt);
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register_gas_io_handler(vm, &(sx_data->pm1a_evt));
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register_gas_io_handler(vm, &vm->pm.sx_state_data->pm1b_cnt);
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register_gas_io_handler(vm, &(sx_data->pm1b_evt));
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register_gas_io_handler(vm, &(sx_data->pm1a_cnt));
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register_gas_io_handler(vm, &(sx_data->pm1b_cnt));
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}
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}
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@ -26,17 +26,17 @@ static void acpi_gas_write(struct acpi_generic_address *gas, uint32_t val)
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if (gas->space_id == SPACE_SYSTEM_MEMORY)
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if (gas->space_id == SPACE_SYSTEM_MEMORY)
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mmio_write_word(val16, HPA2HVA(gas->address));
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mmio_write_word(val16, HPA2HVA(gas->address));
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else
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else
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io_write_word(val16, gas->address);
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io_write_word(val16, (uint16_t)gas->address);
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}
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}
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static uint32_t acpi_gas_read(struct acpi_generic_address *gas)
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static uint32_t acpi_gas_read(struct acpi_generic_address *gas)
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{
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{
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uint32_t ret = 0;
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uint32_t ret = 0U;
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if (gas->space_id == SPACE_SYSTEM_MEMORY)
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if (gas->space_id == SPACE_SYSTEM_MEMORY)
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ret = mmio_read_word(HPA2HVA(gas->address));
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ret = mmio_read_word(HPA2HVA(gas->address));
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else
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else
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ret = io_read_word(gas->address);
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ret = io_read_word((uint16_t)gas->address);
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return ret;
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return ret;
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}
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}
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@ -45,22 +45,24 @@ void do_acpi_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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uint32_t pm1b_cnt_val)
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uint32_t pm1b_cnt_val)
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{
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{
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uint32_t s1, s2;
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uint32_t s1, s2;
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struct pm_s_state_data *sx_data = vm->pm.sx_state_data;
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acpi_gas_write(&vm->pm.sx_state_data->pm1a_cnt, pm1a_cnt_val);
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acpi_gas_write(&(sx_data->pm1a_cnt), pm1a_cnt_val);
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if (vm->pm.sx_state_data->pm1b_cnt.address != 0)
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if (vm->pm.sx_state_data->pm1b_cnt.address != 0U)
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acpi_gas_write(&vm->pm.sx_state_data->pm1b_cnt, pm1b_cnt_val);
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acpi_gas_write(&(sx_data->pm1b_cnt), pm1b_cnt_val);
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while (1) {
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while (1) {
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/* polling PM1 state register to detect wether
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/* polling PM1 state register to detect wether
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* the Sx state enter is interrupted by wakeup event.
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* the Sx state enter is interrupted by wakeup event.
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*/
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*/
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s1 = s2 = 0;
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s1 = 0U;
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s2 = 0U;
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s1 = acpi_gas_read(&vm->pm.sx_state_data->pm1a_evt);
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s1 = acpi_gas_read(&(sx_data->pm1a_evt));
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if (vm->pm.sx_state_data->pm1b_evt.address != 0) {
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if (vm->pm.sx_state_data->pm1b_evt.address != 0U) {
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s2 = acpi_gas_read(&vm->pm.sx_state_data->pm1b_evt);
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s2 = acpi_gas_read(&(sx_data->pm1b_evt));
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s1 |= s2;
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s1 |= s2;
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}
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}
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@ -68,7 +70,7 @@ void do_acpi_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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* WAK_STS(bit 15) is set if system will transition to working
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* WAK_STS(bit 15) is set if system will transition to working
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* state.
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* state.
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*/
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*/
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if ((s1 & (1 << BIT_WAK_STS)) != 0)
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if ((s1 & (1U << BIT_WAK_STS)) != 0U)
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break;
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break;
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}
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}
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}
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}
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@ -76,15 +78,15 @@ void do_acpi_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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uint32_t pm1b_cnt_val)
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uint32_t pm1b_cnt_val)
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{
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{
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uint32_t pcpu_id;
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uint64_t pmain_entry_saved;
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uint64_t pmain_entry_saved;
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uint32_t guest_wakeup_vec32;
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uint32_t guest_wakeup_vec32;
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uint16_t pcpu_id;
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/* We assume enter s3 success by default */
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/* We assume enter s3 success by default */
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host_enter_s3_success = 1;
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host_enter_s3_success = 1U;
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if (vm->pm.sx_state_data == NULL) {
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if (vm->pm.sx_state_data == NULL) {
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pr_err("No Sx state info avaiable. No Sx support");
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pr_err("No Sx state info avaiable. No Sx support");
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host_enter_s3_success = 0;
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host_enter_s3_success = 0U;
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return -1;
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return -1;
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}
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}
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@ -140,9 +140,9 @@ struct vm_io_handler {
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struct vm_io_handler_desc desc;
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struct vm_io_handler_desc desc;
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};
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};
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#define IO_ATTR_R 0
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#define IO_ATTR_R 0U
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#define IO_ATTR_RW 1
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#define IO_ATTR_RW 1U
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#define IO_ATTR_NO_ACCESS 2
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#define IO_ATTR_NO_ACCESS 2U
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/* External Interfaces */
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/* External Interfaces */
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int io_instr_vmexit_handler(struct vcpu *vcpu);
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int io_instr_vmexit_handler(struct vcpu *vcpu);
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