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https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-20 04:33:55 +00:00
hv: treewide: fix 'Switch empty default has no comment'
This patch add some comments after the default and before the break in the switch statement based on MISRA-C requirement. Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
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af7943c5e6
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4106fadeb3
@ -525,6 +525,11 @@ static void ptdev_intr_handle_irq(struct vm *vm,
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break;
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}
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default:
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/*
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* In this switch statement, intx->vpin_src shall either be
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* PTDEV_VPIN_IOAPIC or PTDEV_VPIN_PIC.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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}
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@ -598,6 +603,12 @@ void ptdev_intx_ack(struct vm *vm, uint8_t virt_pin,
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case PTDEV_VPIN_PIC:
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vpic_deassert_irq(vm, virt_pin);
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default:
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/*
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* In this switch statement,
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* entry->ptdev_intr_info.intx.vpin_src shall either be
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* PTDEV_VPIN_IOAPIC or PTDEV_VPIN_PIC.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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@ -369,6 +369,12 @@ void guest_cpuid(struct vcpu *vcpu,
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break;
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default:
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/*
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* In this switch statement, leaf shall either be 0x01U or 0x0bU
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* or 0x0dU. All the other cases have been handled properly
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* before this switch statement.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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}
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@ -827,6 +827,12 @@ static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie)
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error = mmio_write(vcpu, val);
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break;
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default:
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/*
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* For the opcode that is not handled (an invalid opcode), the
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* error code is assigned to a default value (-EINVAL).
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* Gracefully return this error code if prior case clauses have
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* not been met.
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*/
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break;
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}
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@ -915,6 +921,12 @@ static int emulate_movx(struct vcpu *vcpu, struct instr_emul_vie *vie)
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vie_update_register(vcpu, reg, val, size);
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break;
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default:
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/*
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* For the opcode that is not handled (an invalid opcode), the
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* error code is assigned to a default value (-EINVAL).
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* Gracefully return this error code if prior case clauses have
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* not been met.
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*/
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break;
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}
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return error;
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@ -1150,6 +1162,12 @@ static int emulate_test(struct vcpu *vcpu, struct instr_emul_vie *vie)
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result = val1 & val2;
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break;
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default:
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/*
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* For the opcode that is not handled (an invalid opcode), the
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* error code is assigned to a default value (-EINVAL).
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* Gracefully return this error code if prior case clauses have
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* not been met.
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*/
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break;
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}
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@ -1232,6 +1250,12 @@ static int emulate_and(struct vcpu *vcpu, struct instr_emul_vie *vie)
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error = mmio_write(vcpu, result);
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break;
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default:
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/*
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* For the opcode that is not handled (an invalid opcode), the
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* error code is assigned to a default value (-EINVAL).
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* Gracefully return this error code if prior case clauses have
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* not been met.
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*/
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break;
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}
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@ -1318,6 +1342,12 @@ static int emulate_or(struct vcpu *vcpu, struct instr_emul_vie *vie)
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error = mmio_write(vcpu, result);
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break;
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default:
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/*
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* For the opcode that is not handled (an invalid opcode), the
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* error code is assigned to a default value (-EINVAL).
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* Gracefully return this error code if prior case clauses have
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* not been met.
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*/
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break;
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}
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if (error == 0) {
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@ -1462,6 +1492,12 @@ static int emulate_sub(struct vcpu *vcpu, struct instr_emul_vie *vie)
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vie_update_register(vcpu, reg, nval, size);
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break;
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default:
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/*
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* For the opcode that is not handled (an invalid opcode), the
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* error code is assigned to a default value (-EINVAL).
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* Gracefully return this error code if prior case clauses have
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* not been met.
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*/
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break;
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}
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@ -254,6 +254,12 @@ vioapic_indirect_read(struct vioapic *vioapic, uint32_t addr)
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case IOAPIC_ARB:
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return vioapic->id;
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default:
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/*
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* In this switch statement, regnum shall either be IOAPIC_ID or
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* IOAPIC_VER or IOAPIC_ARB.
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* All the other cases will be handled properly later after this
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* switch statement.
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*/
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break;
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}
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@ -294,6 +300,12 @@ vioapic_indirect_write(struct vioapic *vioapic, uint32_t addr, uint32_t data)
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/* readonly */
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break;
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default:
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/*
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* In this switch statement, regnum shall either be IOAPIC_ID or
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* IOAPIC_VER or IOAPIC_ARB.
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* All the other cases will be handled properly later after this
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* switch statement.
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*/
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break;
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}
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@ -531,6 +531,12 @@ lvt_off_to_idx(uint32_t offset)
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index = APIC_LVT_ERROR;
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break;
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default:
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/*
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* For the offset that is not handled (an invalid offset of
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* Local Vector Table), its index is assigned to a default
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* value, which indicates an invalid index.
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* The index will be checked later to guarantee the validity.
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*/
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break;
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}
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ASSERT(index <= VLAPIC_MAXLVT_INDEX,
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@ -867,6 +873,11 @@ vlapic_trigger_lvt(struct acrn_vlapic *vlapic, uint32_t vector)
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vcpu_inject_nmi(vcpu);
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break;
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default:
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/*
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* Only LINT[1:0] pins will be handled here.
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* Gracefully return if prior case clauses have not
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* been met.
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*/
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break;
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}
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return 0;
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@ -87,6 +87,11 @@ handle_vpic_irqline(struct vm *vm, uint32_t irq, enum irq_mode mode)
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case IRQ_PULSE:
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ret = vpic_pulse_irq(vm, irq);
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default:
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/*
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* In this switch statement, mode shall either be IRQ_ASSERT or
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* IRQ_DEASSERT or IRQ_PULSE.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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@ -113,6 +118,11 @@ handle_vioapic_irqline(struct vm *vm, uint32_t irq, enum irq_mode mode)
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ret = vioapic_pulse_irq(vm, irq);
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break;
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default:
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/*
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* In this switch statement, mode shall either be IRQ_ASSERT or
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* IRQ_DEASSERT or IRQ_PULSE.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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return ret;
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@ -194,6 +194,12 @@ static void shell_handle_special_char(uint8_t ch)
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(void) shell_getc();
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break;
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default:
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/*
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* Only the Escape character is treated as special character.
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* All the other characters have been handled properly in
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* shell_input_line, so they will not be handled in this API.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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}
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@ -205,6 +205,11 @@ static void vuart_write(__unused struct vm_io_handler *hdlr,
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vu->scr = value;
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break;
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default:
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/*
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* For the offset that is not handled (either a read-only
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* register or an invalid register), ignore the write to it.
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* Gracefully return if prior case clauses have not been met.
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*/
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break;
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}
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