diff --git a/hypervisor/arch/x86/guest/vcpu.c b/hypervisor/arch/x86/guest/vcpu.c
index 68e1b8798..2f21677d0 100644
--- a/hypervisor/arch/x86/guest/vcpu.c
+++ b/hypervisor/arch/x86/guest/vcpu.c
@@ -579,7 +579,6 @@ void reset_vcpu(struct acrn_vcpu *vcpu)
 		vcpu->arch.exception_info.exception = VECTOR_INVALID;
 		vcpu->arch.cur_context = NORMAL_WORLD;
 		vcpu->arch.irq_window_enabled = false;
-		vcpu->arch.inject_event_pending = false;
 		(void)memset((void *)vcpu->arch.vmcs, 0U, PAGE_SIZE);
 
 		for (i = 0; i < NR_WORLD; i++) {
@@ -646,9 +645,6 @@ static void context_switch_out(struct sched_object *prev)
 {
 	struct acrn_vcpu *vcpu = list_entry(prev, struct acrn_vcpu, sched_obj);
 
-	/* cancel event(int, gp, nmi and exception) injection */
-	cancel_event_injection(vcpu);
-
 	atomic_store32(&vcpu->running, 0U);
 	/* do prev vcpu context switch out */
 	/* For now, we don't need to invalid ept.
diff --git a/hypervisor/arch/x86/guest/virq.c b/hypervisor/arch/x86/guest/virq.c
index 9ead566c2..7d3890b42 100644
--- a/hypervisor/arch/x86/guest/virq.c
+++ b/hypervisor/arch/x86/guest/virq.c
@@ -365,8 +365,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
 	bool injected = false;
 	int32_t ret = 0;
 	uint32_t tmp;
-	uint32_t intr_info;
-	uint32_t error_code;
 	struct acrn_vcpu_arch *arch = &vcpu->arch;
 	uint64_t *pending_req_bits = &arch->pending_req;
 
@@ -387,42 +385,28 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
 			vcpu_set_vmcs_eoi_exit(vcpu);
 		}
 
-		/* handling cancelled event injection when vcpu is switched out */
-		if (arch->inject_event_pending) {
-			if ((arch->inject_info.intr_info & (EXCEPTION_ERROR_CODE_VALID << 8U)) != 0U) {
-				error_code = arch->inject_info.error_code;
-				exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE, error_code);
-			}
-
-			intr_info = arch->inject_info.intr_info;
-			exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, intr_info);
-
-			arch->inject_event_pending = false;
-			injected = true;
-		} else {
-			/* SDM Vol 3 - table 6-2, inject high priority exception before
-			 * maskable hardware interrupt */
-			injected = vcpu_inject_hi_exception(vcpu);
-			if (!injected) {
-				/* inject NMI before maskable hardware interrupt */
-				if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
-					/* Inject NMI vector = 2 */
-					exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
+		/* SDM Vol 3 - table 6-2, inject high priority exception before
+		 * maskable hardware interrupt */
+		injected = vcpu_inject_hi_exception(vcpu);
+		if (!injected) {
+			/* inject NMI before maskable hardware interrupt */
+			if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
+				/* Inject NMI vector = 2 */
+				exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
 						VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8U) | IDT_NMI);
+				injected = true;
+			} else {
+				/* handling pending vector injection:
+				 * there are many reason inject failed, we need re-inject again
+				 * here should take care
+				 * - SW exception (not maskable by IF)
+				 * - external interrupt, if IF clear, will keep in IDT_VEC_INFO_FIELD
+				 *   at next vm exit?
+				 */
+				if ((arch->idt_vectoring_info & VMX_INT_INFO_VALID) != 0U) {
+					exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, arch->idt_vectoring_info);
+					arch->idt_vectoring_info = 0U;
 					injected = true;
-				} else {
-					/* handling pending vector injection:
-					 * there are many reason inject failed, we need re-inject again
-					 * here should take care
-					 * - SW exception (not maskable by IF)
-					 * - external interrupt, if IF clear, will keep in IDT_VEC_INFO_FIELD
-					 *   at next vm exit?
-					 */
-					if ((arch->idt_vectoring_info & VMX_INT_INFO_VALID) != 0U) {
-						exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, arch->idt_vectoring_info);
-						arch->idt_vectoring_info = 0U;
-						injected = true;
-					}
 				}
 			}
 		}
@@ -485,31 +469,6 @@ static inline bool acrn_inject_pending_intr(struct acrn_vcpu *vcpu,
 	return ret;
 }
 
-void cancel_event_injection(struct acrn_vcpu *vcpu)
-{
-	uint32_t intinfo;
-
-	intinfo = exec_vmread32(VMX_ENTRY_INT_INFO_FIELD);
-
-	/*
-	 * If event is injected, we clear VMX_ENTRY_INT_INFO_FIELD,
-	 * save injection info, and mark inject event pending.
-	 * The event will be re-injected in next acrn_handle_pending_request
-	 * call.
-	 */
-	if ((intinfo & VMX_INT_INFO_VALID) != 0U) {
-		vcpu->arch.inject_event_pending = true;
-
-		if ((intinfo & (EXCEPTION_ERROR_CODE_VALID << 8U)) != 0U) {
-			vcpu->arch.inject_info.error_code =
-				exec_vmread32(VMX_ENTRY_EXCEPTION_ERROR_CODE);
-		}
-
-		vcpu->arch.inject_info.intr_info = intinfo;
-		exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, 0U);
-	}
-}
-
 /*
  * @pre vcpu != NULL
  */
diff --git a/hypervisor/include/arch/x86/guest/vcpu.h b/hypervisor/include/arch/x86/guest/vcpu.h
index 77b939cf3..aead6ef84 100644
--- a/hypervisor/include/arch/x86/guest/vcpu.h
+++ b/hypervisor/include/arch/x86/guest/vcpu.h
@@ -264,11 +264,6 @@ struct ext_context {
 
 #define EOI_EXIT_BITMAP_SIZE	256U
 
-struct event_injection_info {
-	uint32_t intr_info;
-	uint32_t error_code;
-};
-
 struct cpu_context {
 	struct run_context run_ctx;
 	struct ext_context ext_ctx;
@@ -339,8 +334,6 @@ struct acrn_vcpu_arch {
 
 	/* interrupt injection information */
 	uint64_t pending_req;
-	bool inject_event_pending;
-	struct event_injection_info inject_info;
 
 	/* List of MSRS to be stored and loaded on VM exits or VM entries */
 	struct msr_store_area msr_area;
diff --git a/hypervisor/include/arch/x86/irq.h b/hypervisor/include/arch/x86/irq.h
index 84cbafd9c..d31b3fcea 100644
--- a/hypervisor/include/arch/x86/irq.h
+++ b/hypervisor/include/arch/x86/irq.h
@@ -210,8 +210,6 @@ int32_t interrupt_window_vmexit_handler(struct acrn_vcpu *vcpu);
 int32_t external_interrupt_vmexit_handler(struct acrn_vcpu *vcpu);
 int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu);
 
-void cancel_event_injection(struct acrn_vcpu *vcpu);
-
 extern uint64_t irq_alloc_bitmap[IRQ_ALLOC_BITMAP_SIZE];
 
 typedef void (*irq_action_t)(uint32_t irq, void *priv_data);