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hv: vpci: add _v prefix for some function name
Add _v prefix for some function name to indicate this function wants to operate on virtual CFG space or virtual BAR register. Tracked-On: #4371 Signed-off-by: Li Fei1 <fei1.li@intel.com>
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@@ -69,12 +69,12 @@ static void remap_vmsi(const struct pci_vdev *vdev)
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uint32_t vmsi_msgdata, vmsi_addrlo, vmsi_addrhi = 0U;
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/* Read the MSI capability structure from virtual device */
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vmsi_addrlo = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_ADDR), 4U);
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vmsi_addrlo = pci_vdev_read_vcfg(vdev, (capoff + PCIR_MSI_ADDR), 4U);
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if (vdev->msi.is_64bit) {
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vmsi_addrhi = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_ADDR_HIGH), 4U);
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vmsi_msgdata = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_DATA_64BIT), 2U);
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vmsi_addrhi = pci_vdev_read_vcfg(vdev, (capoff + PCIR_MSI_ADDR_HIGH), 4U);
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vmsi_msgdata = pci_vdev_read_vcfg(vdev, (capoff + PCIR_MSI_DATA_64BIT), 2U);
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} else {
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vmsi_msgdata = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_DATA), 2U);
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vmsi_msgdata = pci_vdev_read_vcfg(vdev, (capoff + PCIR_MSI_DATA), 2U);
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}
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info.vmsi_addr.full = (uint64_t)vmsi_addrlo | ((uint64_t)vmsi_addrhi << 32U);
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info.vmsi_data.full = vmsi_msgdata;
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@@ -101,7 +101,7 @@ static void remap_vmsi(const struct pci_vdev *vdev)
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void vmsi_read_cfg(const struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val)
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{
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/* For PIO access, we emulate Capability Structures only */
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*val = pci_vdev_read_cfg(vdev, offset, bytes);
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*val = pci_vdev_read_vcfg(vdev, offset, bytes);
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}
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/**
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@@ -114,9 +114,9 @@ void vmsi_write_cfg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint
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uint32_t msgctrl;
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enable_disable_msi(vdev, false);
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pci_vdev_write_cfg(vdev, offset, bytes, val);
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pci_vdev_write_vcfg(vdev, offset, bytes, val);
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msgctrl = pci_vdev_read_cfg(vdev, vdev->msi.capoff + PCIR_MSI_CTRL, 2U);
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msgctrl = pci_vdev_read_vcfg(vdev, vdev->msi.capoff + PCIR_MSI_CTRL, 2U);
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if ((msgctrl & PCIM_MSICTRL_MSI_ENABLE) != 0U) {
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remap_vmsi(vdev);
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}
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@@ -152,7 +152,7 @@ void init_vmsi(struct pci_vdev *vdev)
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val &= ~((uint32_t)PCIM_MSICTRL_MMC_MASK << 16U);
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val &= ~((uint32_t)PCIM_MSICTRL_MME_MASK << 16U);
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pci_vdev_write_cfg(vdev, vdev->msi.capoff, 4U, val);
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pci_vdev_write_vcfg(vdev, vdev->msi.capoff, 4U, val);
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}
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}
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