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doc: update supported hardware document
Fixes: #5741 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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@ -25,35 +25,28 @@ Minimum Requirements for Processor
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Known Limitations
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*****************
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Platforms with multiple PCI segments
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ACRN assumes the following conditions are satisfied from the Platform BIOS
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Platforms with multiple PCI segments are not supported.
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* All the PCI device BARs should be assigned resources, including SR-IOV VF BARs if a device supports.
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ACRN assumes the following conditions are satisfied from the Platform BIOS:
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* Bridge windows for PCI bridge devices and the resources for root bus, should be programmed with values
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* All the PCI device BARs must be assigned resources, including SR-IOV VF BARs if a device supports it.
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* Bridge windows for PCI bridge devices and the resources for root bus must be programmed with values
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that enclose resources used by all the downstream devices.
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* There should be no conflict in resources among the PCI devices and also between PCI devices and other platform devices.
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* There should be no conflict in resources among the PCI devices or with other platform devices.
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New Processor Families
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**********************
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Here are announced Intel processor architectures that are supported by ACRN v2.2, but don't yet have a recommended platform available:
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Tested Platforms by ACRN Release
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********************************
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* `Tiger Lake <https://ark.intel.com/content/www/us/en/ark/products/codename/88759/tiger-lake.html#@Embedded>`_
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(Q3'2020 Launch Date)
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* `Elkhart Lake <https://ark.intel.com/content/www/us/en/ark/products/codename/128825/elkhart-lake.html#@Embedded>`_
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(Q1'2021 Launch Date)
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These platforms have been tested by the development team with the noted ACRN
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release version and may not work as expected on later ACRN releases.
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Verified Platforms According to ACRN Usage
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******************************************
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These Apollo Lake and Kaby Lake platforms have been verified by the
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development team for Software-Defined Cockpit (SDC), Industrial Usage
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(IU), and Logical Partition scenarios.
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.. _NUC11TNHi5:
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https://ark.intel.com/content/www/us/en/ark/products/205594/intel-nuc-11-pro-kit-nuc11tnhi5.html
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.. _NUC6CAYH:
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https://www.intel.com/content/www/us/en/products/boards-kits/nuc/kits/nuc6cayh.html
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@ -79,50 +72,70 @@ development team for Software-Defined Cockpit (SDC), Industrial Usage
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For general instructions setting up ACRN on supported hardware platforms, visit the :ref:`rt_industry_ubuntu_setup` page.
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.. list-table:: Supported Target Platforms
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:widths: 20 20 12 5 5
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:header-rows: 1
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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| Platform (Intel x86) | Product/Kit Name | Usage Scenario - BKC Examples |
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| | +-----------+-----------+-------------+------------+
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| | | SDC with | IU without| IU with | Logical |
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| | | 2 VMs | Safety VM | Safety VM | Partition |
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| | | | | | |
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+================================+=========================+===========+===========+=============+============+
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| | **Apollo Lake** | | `NUC6CAYH`_ | V | V | | |
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| | (Formal name: Arches Canyon | | (Board: NUC6CAYB) | | | | |
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| | | | | | |
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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| **Apollo Lake** | | UP2 - N3350 | V | | | |
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| | | UP2 - N4200 | | | | |
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| | | UP2 - x5-E3940 | | | | |
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| | | (see `UP2 Shop`_) | | | | |
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| | | | | | |
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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| | **Kaby Lake** | | `NUC7i5BNH`_ | V | | | |
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| | (Code name: Baby Canyon) | | (Board: NUC7i5BNB) | | | | |
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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| | **Kaby Lake** | | `NUC7i7BNH`_ | V | | | |
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| | (Code name: Baby Canyon) | | (Board: NUC7i7BNB | | | | |
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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| | **Kaby Lake** | | `NUC7i5DNH`_ | V | | | |
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| | (Code name: Dawson Canyon) | | (Board: NUC7i5DNB) | | | | |
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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| | **Kaby Lake** | | `NUC7i7DNH`_ | V | V | V | V |
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| | (Code name: Dawson Canyon) | | (Board: NUC7i7DNB) | | | | |
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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| | **Whiskey Lake** | | `WHL-IPC-I5`_ | V | V | V | V |
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| | | | (Board: WHL-IPC-I5) | | | | |
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+--------------------------------+-------------------------+-----------+-----------+-------------+------------+
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* - Intel x86 Platform Family
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- Product / Kit Name
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- Board configuration
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- ACRN Release
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- Graphics
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* - **Tiger Lake**
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- `NUC11TNHi5`_ |br| (Board: NUC11TNBi5)
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- :acrn_file:`nuc11tnbi5.xml <misc/config_tools/data/nuc11tnbi5/nuc11tnbi5.xml>`
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- v2.5
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- GVT-d
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* - **Whiskey Lake**
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- `WHL-IPC-I5`_ |br| (Board: WHL-IPC-I5)
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- :acrn_file:`whl-ipc-i5.xml <misc/config_tools/data/whl-ipc-i5/whl-ipc-i5.xml>`
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- v2.0
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- GVT-g
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* - **Kaby Lake** |br| (Codename: Baby Canyon)
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- `NUC7i5BNH`_ |br| (board: NUC7i5BNB)
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-
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- v1.6.1
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- GVT-g
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* - **Kaby Lake** |br| (Codename: Baby Canyon)
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- `NUC7i7BNH`_ |br| (board: NUC7i7BNB)
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-
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- v1.6.1
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- GVT-g
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* - **Kaby Lake** |br| (Codename: Dawson Canyon)
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- `NUC7i5DNH`_ |br| (board: NUC7i5DNB)
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-
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- v1.6.1
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- GVT-g
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* - **Kaby Lake** |br| (Codename: Dawson Canyon)
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- `NUC7i7DNH`_ |br| (board: NUC7i7DNB)
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- :acrn_file:`nuc7i7dnb.xml <misc/config_tools/data/nuc7i7dnb/nuc7i7dnb.xml>`
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- v1.6.1
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- GVT-g
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* - **Apollo Lake** |br| (Codename: Arches Canyon)
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- `NUC6CAYH`_ |br| (board: NUC6CAYB)
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- :acrn_file:`nuc6cayh.xml <misc/config_tools/data/nuc6cayh/nuc6cayh.xml>`
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- v1.6.1
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- GVT-g
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* - **Apollo Lake**
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- `UP2-N3350 <UP2 Shop>`_, |br| `UP2-N4200, UP2-x5-E3940 <UP2 Shop>`_
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-
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- v1.0
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- GVT-g
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V: Verified by engineering team; remaining scenarios are not in verification scope
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If an XML file is not provided by project ACRN for your board, we recommend you
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start with a provided board XML file for a similar board and use the configuration
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editor to make needed changes to match your board's configuration, or use the
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board inspector tool to generate an XML file specifically for your board.
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Verified Hardware Specifications Detail
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***************************************
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Tested Hardware Specifications Detail
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*************************************
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+--------------------------------+------------------------+------------------------+-----------------------------------------------------------+
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| Platform (Intel x86) | Product/Kit Name | Hardware Class | Description |
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+================================+========================+========================+===========================================================+
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| | **Apollo Lake** | | NUC6CAYH | Processor | - Intel® Celeron™ CPU J3455 @ 1.50GHz (4C4T) |
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| | (Formal name: Arches Canyon) | | (Board: NUC6CAYB) | | |
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| | (Code name: Arches Canyon) | | (Board: NUC6CAYB) | | |
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| | +------------------------+-----------------------------------------------------------+
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| | | Graphics | - Intel® HD Graphics 500 |
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| | | | - VGA (HDB15); HDMI 2.0 |
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@ -233,6 +246,19 @@ Verified Hardware Specifications Detail
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| | +------------------------+-----------------------------------------------------------+
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| | | Serial Port | - Yes |
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+--------------------------------+------------------------+------------------------+-----------------------------------------------------------+
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| | **Tiger Lake** | | NUC11TNHi5 | Processor | - Intel® Core™ i5-113G7 CPU (8M Cache, up to 4.2 GHz) |
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| | | | (Board: NUC11TNBi5) | | |
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| | +------------------------+-----------------------------------------------------------+
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| | | Graphics | - Dual HDMI 2.0b w/HDMI CEC, Dual DP 1.4a via Type C |
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| | | | - Supports 4 displays |
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| | +------------------------+-----------------------------------------------------------+
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| | | System memory | - Two DDR4 SO-DIMM sockets (up to 64 GB, 3200 MHz), 1.2V |
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| | +------------------------+-----------------------------------------------------------+
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| | | Storage capabilities | - One M.2 connector for storage |
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| | | | 22x80 NVMe (M), 22x42 SATA (B) |
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| | +------------------------+-----------------------------------------------------------+
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| | | Serial Port | - Yes |
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+--------------------------------+------------------------+------------------------+-----------------------------------------------------------+
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.. # vim: tw=200
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