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hv: refine virtualization flow for cr0 and cr4

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- The current code to virtualize CR0/CR4 is not
   well designed, and hard to read.
   This patch reshuffle the logic to make it clear
   and classify those bits into PASSTHRU,
   TRAP_AND_PASSTHRU, TRAP_AND_EMULATE & reserved bits.

Tracked-On: #5586
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
This commit is contained in:
Yonghua Huang
2020-12-09 21:45:12 +08:00
committed by wenlingz
parent f31be45df0
commit 442fc30117
9 changed files with 316 additions and 198 deletions
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6
hypervisor/common/hypercall.c
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@@ -366,8 +366,10 @@ int32_t hcall_set_vcpu_regs(struct acrn_vm *vm, struct acrn_vm *target_vm, __unu
} else {
vcpu = vcpu_from_vid(target_vm, vcpu_regs.vcpu_id);
if (vcpu->state != VCPU_OFFLINE) {
set_vcpu_regs(vcpu, &(vcpu_regs.vcpu_regs));
ret = 0;
if (is_valid_cr0_cr4(vcpu_regs.vcpu_regs.cr0, vcpu_regs.vcpu_regs.cr4)) {
set_vcpu_regs(vcpu, &(vcpu_regs.vcpu_regs));
ret = 0;
}
}
}
}