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hv: keylocker: Enable the tertiary VM-execution controls
In order for a VMM to capture the IWKey values of guests, processors that support Key Locker also support a new "LOADIWKEY exiting" VM-execution control in bit 0 of the tertiary processor-based VM-execution controls. This patch enables the tertiary VM-execution controls. Tracked-On: #5695 Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@@ -266,6 +266,7 @@ static void init_exec_ctrl(struct acrn_vcpu *vcpu)
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* guest access to IO bit-mapped ports causes VM exit
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* guest access to MSR causes VM exit
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* Activate secondary controls
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* Activate tertiary controls
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*/
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/* These are bits 1,4-6,8,13-16, and 26, the corresponding bits of
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* the IA32_VMX_PROCBASED_CTRLS MSR are always read as 1 --- A.3.2
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@@ -273,7 +274,7 @@ static void init_exec_ctrl(struct acrn_vcpu *vcpu)
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value32 = check_vmx_ctrl(MSR_IA32_VMX_PROCBASED_CTLS,
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VMX_PROCBASED_CTLS_TSC_OFF | VMX_PROCBASED_CTLS_TPR_SHADOW |
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VMX_PROCBASED_CTLS_IO_BITMAP | VMX_PROCBASED_CTLS_MSR_BITMAP |
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VMX_PROCBASED_CTLS_HLT | VMX_PROCBASED_CTLS_SECONDARY);
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VMX_PROCBASED_CTLS_HLT | VMX_PROCBASED_CTLS_SECONDARY | VMX_PROCBASED_CTLS_TERTIARY);
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/*Disable VM_EXIT for CR3 access*/
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value32 &= ~(VMX_PROCBASED_CTLS_CR3_LOAD | VMX_PROCBASED_CTLS_CR3_STORE);
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