github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-08 04:09:11 +00:00
Code Issues Projects Releases Wiki Activity

hv: fix 'User name starts with underscore'

Browse Source 
There are chances that names with leading underscore declared by
developers are conflict with the ones reserved for the compiler.

What this patch does:
- rename these functions/variables/macros starting with
  underscore to avoid such unintentational mistakes.
- remove gpr.h without any contents

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao
2018-09-29 15:46:27 +08:00
committed by Xie, Nanlin
parent 390861a04c
commit 4544d28ee1
27 changed files with 75 additions and 95 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
hypervisor/arch/x86/cpu.c
View File

@@ -388,8 +388,8 @@ void bsp_boot_init(void)
start_tsc = rdtsc();
/* Clear BSS */
(void)memset(&_ld_bss_start, 0U,
(size_t)(&_ld_bss_end - &_ld_bss_start));
(void)memset(&ld_bss_start, 0U,
(size_t)(&ld_bss_end - &ld_bss_start));
bitmap_set_nolock(BOOT_CPU_ID, &pcpu_active_bitmap);

6
hypervisor/arch/x86/cpu_primary.S
View File

@@ -131,7 +131,7 @@ cpu_primary_start_64:
primary_start_long_mode:
/* Initialize temporary stack pointer */
lea _ld_bss_end(%rip), %rsp
lea ld_bss_end(%rip), %rsp
/*0x1000 = CPU_PAGE_SIZE*/
add $0x1000,%rsp
/* 16 = CPU_STACK_ALIGN */
@@ -142,7 +142,7 @@ primary_start_long_mode:
* Notes: this includes the fixup to IDT tables and temporary
* page tables
*/
call _relocate
call relocate
/* Load temportary GDT pointer value */
lea cpu_primary32_gdt_ptr(%rip), %rbx
@@ -172,7 +172,7 @@ after:
/*
* Fix up the IDT desciptors
* The relocation delta in IDT tables has been fixed in _relocate()
* The relocation delta in IDT tables has been fixed in relocate()
*/
leal HOST_IDT(%rip), %edx
movl $HOST_IDT_ENTRIES, %ecx

6
hypervisor/arch/x86/guest/vlapic_priv.h
View File

@@ -27,8 +27,8 @@
* $FreeBSD$
*/
#ifndef _VLAPIC_PRIV_H_
#define _VLAPIC_PRIV_H_
#ifndef VLAPIC_PRIV_H
#define VLAPIC_PRIV_H
/*
* APIC Register: Offset Description
@@ -82,4 +82,4 @@
#define APIC_OFFSET_TIMER_DCR 0x3E0U /* Timer's Divide Configuration */
#endif /* _VLAPIC_PRIV_H_ */
#endif /* VLAPIC_PRIV_H */

2
hypervisor/arch/x86/mmu.c
View File

@@ -59,7 +59,7 @@ static uint16_t vmx_vpid_nr = VMX_MIN_NR_VPID;
struct invept_desc {
uint64_t eptp;
uint64_t _res;
uint64_t res;
};
static inline void local_invvpid(uint64_t type, uint16_t vpid, uint64_t gva)

8
hypervisor/arch/x86/pagetable.c
View File

@@ -56,7 +56,7 @@ static int split_large_page(uint64_t *pte,
return 0;
}
static inline void __modify_or_del_pte(uint64_t *pte,
static inline void local_modify_or_del_pte(uint64_t *pte,
uint64_t prot_set, uint64_t prot_clr, uint32_t type)
{
if (type == MR_MODIFY) {
@@ -111,7 +111,7 @@ static int modify_or_del_pte(uint64_t *pde,
return -EFAULT;
}
__modify_or_del_pte(pte, prot_set, prot_clr, type);
local_modify_or_del_pte(pte, prot_set, prot_clr, type);
vaddr += PTE_SIZE;
if (vaddr >= vaddr_end) {
break;
@@ -156,7 +156,7 @@ static int modify_or_del_pde(uint64_t *pdpte,
return ret;
}
} else {
__modify_or_del_pte(pde,
local_modify_or_del_pte(pde,
prot_set, prot_clr, type);
if (vaddr_next < vaddr_end) {
vaddr = vaddr_next;
@@ -211,7 +211,7 @@ static int modify_or_del_pdpte(uint64_t *pml4e,
return ret;
}
} else {
__modify_or_del_pte(pdpte,
local_modify_or_del_pte(pdpte,
prot_set, prot_clr, type);
if (vaddr_next < vaddr_end) {
vaddr = vaddr_next;

2
hypervisor/arch/x86/pm.c
View File

@@ -123,7 +123,7 @@ int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
suspend_iommu();
suspend_lapic();
__enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
asm_enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
/* release the lock aquired in trampoline code */
spinlock_release(&trampoline_spinlock);

2
hypervisor/arch/x86/trampoline.S
View File

@@ -38,7 +38,7 @@
*/
.extern cpu_secondary_init
.extern _ld_bss_end
.extern ld_bss_end
.extern HOST_GDTR
.section .trampoline_reset,"ax"

6
hypervisor/arch/x86/virq.c
View File

@@ -248,7 +248,7 @@ int vcpu_queue_exception(struct vcpu *vcpu, uint32_t vector,
return 0;
}
static void _vcpu_inject_exception(struct vcpu *vcpu, uint32_t vector)
static void vcpu_inject_exception(struct vcpu *vcpu, uint32_t vector)
{
if ((exception_type[vector] & EXCEPTION_ERROR_CODE_VALID) != 0U) {
exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE,
@@ -266,7 +266,7 @@ static int vcpu_inject_hi_exception(struct vcpu *vcpu)
uint32_t vector = vcpu->arch_vcpu.exception_info.exception;
if (vector == IDT_MC || vector == IDT_BP || vector == IDT_DB) {
_vcpu_inject_exception(vcpu, vector);
vcpu_inject_exception(vcpu, vector);
return 1;
}
@@ -279,7 +279,7 @@ static int vcpu_inject_lo_exception(struct vcpu *vcpu)
/* high priority exception already be injected */
if (vector <= NR_MAX_VECTOR) {
_vcpu_inject_exception(vcpu, vector);
vcpu_inject_exception(vcpu, vector);
return 1;
}

4
hypervisor/arch/x86/wakeup.S
View File

@@ -30,8 +30,8 @@
.extern do_acpi_s3
.extern trampoline_spinlock
.global __enter_s3
__enter_s3:
.global asm_enter_s3
asm_enter_s3:
/*
* 0U=0x0=CPU_CONTEXT_OFFSET_RAX
* 8U=0x8=CPU_CONTEXT_OFFSET_RCX