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hv: fix 'User name starts with underscore'

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There are chances that names with leading underscore declared by
developers are conflict with the ones reserved for the compiler.

What this patch does:
- rename these functions/variables/macros starting with
  underscore to avoid such unintentational mistakes.
- remove gpr.h without any contents

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao 2018-09-29 15:46:27 +08:00 committed by Xie, Nanlin
parent 390861a04c
commit 4544d28ee1
27 changed files with 75 additions and 95 deletions
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4
hypervisor/arch/x86/cpu.c
View File

@ -388,8 +388,8 @@ void bsp_boot_init(void)
start_tsc = rdtsc(); start_tsc = rdtsc();
/* Clear BSS */ /* Clear BSS */
(void)memset(&_ld_bss_start, 0U, (void)memset(&ld_bss_start, 0U,
(size_t)(&_ld_bss_end - &_ld_bss_start)); (size_t)(&ld_bss_end - &ld_bss_start));
bitmap_set_nolock(BOOT_CPU_ID, &pcpu_active_bitmap); bitmap_set_nolock(BOOT_CPU_ID, &pcpu_active_bitmap);

6
hypervisor/arch/x86/cpu_primary.S
View File

@ -131,7 +131,7 @@ cpu_primary_start_64:
primary_start_long_mode: primary_start_long_mode:
/* Initialize temporary stack pointer */ /* Initialize temporary stack pointer */
lea _ld_bss_end(%rip), %rsp lea ld_bss_end(%rip), %rsp
/*0x1000 = CPU_PAGE_SIZE*/ /*0x1000 = CPU_PAGE_SIZE*/
add $0x1000,%rsp add $0x1000,%rsp
/* 16 = CPU_STACK_ALIGN */ /* 16 = CPU_STACK_ALIGN */
@ -142,7 +142,7 @@ primary_start_long_mode:
* Notes: this includes the fixup to IDT tables and temporary * Notes: this includes the fixup to IDT tables and temporary
* page tables * page tables
*/ */
call _relocate call relocate
/* Load temportary GDT pointer value */ /* Load temportary GDT pointer value */
lea cpu_primary32_gdt_ptr(%rip), %rbx lea cpu_primary32_gdt_ptr(%rip), %rbx
@ -172,7 +172,7 @@ after:
/* /*
* Fix up the IDT desciptors * Fix up the IDT desciptors
* The relocation delta in IDT tables has been fixed in _relocate() * The relocation delta in IDT tables has been fixed in relocate()
*/ */
leal HOST_IDT(%rip), %edx leal HOST_IDT(%rip), %edx
movl $HOST_IDT_ENTRIES, %ecx movl $HOST_IDT_ENTRIES, %ecx

6
hypervisor/arch/x86/guest/vlapic_priv.h
View File

@ -27,8 +27,8 @@
* $FreeBSD$ * $FreeBSD$
*/ */
#ifndef _VLAPIC_PRIV_H_ #ifndef VLAPIC_PRIV_H
#define _VLAPIC_PRIV_H_ #define VLAPIC_PRIV_H
/* /*
* APIC Register: Offset Description * APIC Register: Offset Description
@ -82,4 +82,4 @@
#define APIC_OFFSET_TIMER_DCR 0x3E0U /* Timer's Divide Configuration */ #define APIC_OFFSET_TIMER_DCR 0x3E0U /* Timer's Divide Configuration */
#endif /* _VLAPIC_PRIV_H_ */ #endif /* VLAPIC_PRIV_H */

2
hypervisor/arch/x86/mmu.c
View File

@ -59,7 +59,7 @@ static uint16_t vmx_vpid_nr = VMX_MIN_NR_VPID;
struct invept_desc { struct invept_desc {
uint64_t eptp; uint64_t eptp;
uint64_t _res; uint64_t res;
}; };
static inline void local_invvpid(uint64_t type, uint16_t vpid, uint64_t gva) static inline void local_invvpid(uint64_t type, uint16_t vpid, uint64_t gva)

8
hypervisor/arch/x86/pagetable.c
View File

@ -56,7 +56,7 @@ static int split_large_page(uint64_t *pte,
return 0; return 0;
} }
static inline void __modify_or_del_pte(uint64_t *pte, static inline void local_modify_or_del_pte(uint64_t *pte,
uint64_t prot_set, uint64_t prot_clr, uint32_t type) uint64_t prot_set, uint64_t prot_clr, uint32_t type)
{ {
if (type == MR_MODIFY) { if (type == MR_MODIFY) {
@ -111,7 +111,7 @@ static int modify_or_del_pte(uint64_t *pde,
return -EFAULT; return -EFAULT;
} }
__modify_or_del_pte(pte, prot_set, prot_clr, type); local_modify_or_del_pte(pte, prot_set, prot_clr, type);
vaddr += PTE_SIZE; vaddr += PTE_SIZE;
if (vaddr >= vaddr_end) { if (vaddr >= vaddr_end) {
break; break;
@ -156,7 +156,7 @@ static int modify_or_del_pde(uint64_t *pdpte,
return ret; return ret;
} }
} else { } else {
__modify_or_del_pte(pde, local_modify_or_del_pte(pde,
prot_set, prot_clr, type); prot_set, prot_clr, type);
if (vaddr_next < vaddr_end) { if (vaddr_next < vaddr_end) {
vaddr = vaddr_next; vaddr = vaddr_next;
@ -211,7 +211,7 @@ static int modify_or_del_pdpte(uint64_t *pml4e,
return ret; return ret;
} }
} else { } else {
__modify_or_del_pte(pdpte, local_modify_or_del_pte(pdpte,
prot_set, prot_clr, type); prot_set, prot_clr, type);
if (vaddr_next < vaddr_end) { if (vaddr_next < vaddr_end) {
vaddr = vaddr_next; vaddr = vaddr_next;

2
hypervisor/arch/x86/pm.c
View File

@ -123,7 +123,7 @@ int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
suspend_iommu(); suspend_iommu();
suspend_lapic(); suspend_lapic();
__enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val); asm_enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
/* release the lock aquired in trampoline code */ /* release the lock aquired in trampoline code */
spinlock_release(&trampoline_spinlock); spinlock_release(&trampoline_spinlock);

2
hypervisor/arch/x86/trampoline.S
View File

@ -38,7 +38,7 @@
*/ */
.extern cpu_secondary_init .extern cpu_secondary_init
.extern _ld_bss_end .extern ld_bss_end
.extern HOST_GDTR .extern HOST_GDTR
.section .trampoline_reset,"ax" .section .trampoline_reset,"ax"

6
hypervisor/arch/x86/virq.c
View File

@ -248,7 +248,7 @@ int vcpu_queue_exception(struct vcpu *vcpu, uint32_t vector,
return 0; return 0;
} }
static void _vcpu_inject_exception(struct vcpu *vcpu, uint32_t vector) static void vcpu_inject_exception(struct vcpu *vcpu, uint32_t vector)
{ {
if ((exception_type[vector] & EXCEPTION_ERROR_CODE_VALID) != 0U) { if ((exception_type[vector] & EXCEPTION_ERROR_CODE_VALID) != 0U) {
exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE, exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE,
@ -266,7 +266,7 @@ static int vcpu_inject_hi_exception(struct vcpu *vcpu)
uint32_t vector = vcpu->arch_vcpu.exception_info.exception; uint32_t vector = vcpu->arch_vcpu.exception_info.exception;
if (vector == IDT_MC || vector == IDT_BP || vector == IDT_DB) { if (vector == IDT_MC || vector == IDT_BP || vector == IDT_DB) {
_vcpu_inject_exception(vcpu, vector); vcpu_inject_exception(vcpu, vector);
return 1; return 1;
} }
@ -279,7 +279,7 @@ static int vcpu_inject_lo_exception(struct vcpu *vcpu)
/* high priority exception already be injected */ /* high priority exception already be injected */
if (vector <= NR_MAX_VECTOR) { if (vector <= NR_MAX_VECTOR) {
_vcpu_inject_exception(vcpu, vector); vcpu_inject_exception(vcpu, vector);
return 1; return 1;
} }

4
hypervisor/arch/x86/wakeup.S
View File

@ -30,8 +30,8 @@
.extern do_acpi_s3 .extern do_acpi_s3
.extern trampoline_spinlock .extern trampoline_spinlock
.global __enter_s3 .global asm_enter_s3
__enter_s3: asm_enter_s3:
/* /*
* 0U=0x0=CPU_CONTEXT_OFFSET_RAX * 0U=0x0=CPU_CONTEXT_OFFSET_RAX
* 8U=0x8=CPU_CONTEXT_OFFSET_RCX * 8U=0x8=CPU_CONTEXT_OFFSET_RCX

10
hypervisor/boot/include/reloc.h
View File

@ -6,7 +6,7 @@
#ifndef RELOCATE_H #ifndef RELOCATE_H
#define RELOCATE_H #define RELOCATE_H
extern void _relocate(void); extern void relocate(void);
extern uint64_t get_hv_image_delta(void); extern uint64_t get_hv_image_delta(void);
extern uint64_t get_hv_image_base(void); extern uint64_t get_hv_image_base(void);
extern uint64_t read_trampoline_sym(void *sym); extern uint64_t read_trampoline_sym(void *sym);
@ -15,10 +15,10 @@ extern uint64_t prepare_trampoline(void);
/* external symbols that are helpful for relocation */ /* external symbols that are helpful for relocation */
extern uint8_t _DYNAMIC[1]; extern uint8_t _DYNAMIC[1];
extern const uint8_t _ld_trampoline_load; extern const uint8_t ld_trampoline_load;
extern uint8_t _ld_trampoline_start; extern uint8_t ld_trampoline_start;
extern uint8_t _ld_trampoline_end; extern uint8_t ld_trampoline_end;
extern const uint64_t _ld_trampoline_size; extern const uint64_t ld_trampoline_size;
extern uint8_t cpu_primary_start_32; extern uint8_t cpu_primary_start_32;
extern uint8_t cpu_primary_start_64; extern uint8_t cpu_primary_start_64;

8
hypervisor/boot/reloc.c
View File

@ -70,7 +70,7 @@ static uint64_t trampoline_relo_addr(void *addr)
return (uint64_t)addr - get_hv_image_delta(); return (uint64_t)addr - get_hv_image_delta();
} }
void _relocate(void) void relocate(void)
{ {
#ifdef CONFIG_RELOC #ifdef CONFIG_RELOC
struct Elf64_Dyn *dyn; struct Elf64_Dyn *dyn;
@ -108,7 +108,7 @@ void _relocate(void)
* Need to subtract the relocation delta to get the correct * Need to subtract the relocation delta to get the correct
* absolute addresses * absolute addresses
*/ */
trampoline_end = (uint64_t)(&_ld_trampoline_end) - delta; trampoline_end = (uint64_t)(&ld_trampoline_end) - delta;
primary_32_start = (uint64_t)(&cpu_primary_start_32) - delta; primary_32_start = (uint64_t)(&cpu_primary_start_32) - delta;
primary_32_end = (uint64_t)(&cpu_primary_start_64) - delta; primary_32_end = (uint64_t)(&cpu_primary_start_64) - delta;
@ -214,7 +214,7 @@ uint64_t prepare_trampoline(void)
{ {
uint64_t size, dest_pa; uint64_t size, dest_pa;
size = (uint64_t)(&_ld_trampoline_end - &_ld_trampoline_start); size = (uint64_t)(&ld_trampoline_end - &ld_trampoline_start);
#ifndef CONFIG_EFI_STUB #ifndef CONFIG_EFI_STUB
dest_pa = e820_alloc_low_memory(CONFIG_LOW_RAM_SIZE); dest_pa = e820_alloc_low_memory(CONFIG_LOW_RAM_SIZE);
#else #else
@ -224,7 +224,7 @@ uint64_t prepare_trampoline(void)
pr_dbg("trampoline code: %llx size %x", dest_pa, size); pr_dbg("trampoline code: %llx size %x", dest_pa, size);
/* Copy segment for AP initialization code below 1MB */ /* Copy segment for AP initialization code below 1MB */
(void)memcpy_s(hpa2hva(dest_pa), (size_t)size, &_ld_trampoline_load, (void)memcpy_s(hpa2hva(dest_pa), (size_t)size, &ld_trampoline_load,
(size_t)size); (size_t)size);
update_trampoline_code_refs(dest_pa); update_trampoline_code_refs(dest_pa);
trampoline_start16_paddr = dest_pa; trampoline_start16_paddr = dest_pa;

16
hypervisor/bsp/ld/link_ram.ld.in
View File

@ -46,20 +46,20 @@ SECTIONS
} > ram } > ram
. = ALIGN(4) ; . = ALIGN(4) ;
_ld_trampoline_load = .; ld_trampoline_load = .;
.trampoline : AT (_ld_trampoline_load) .trampoline : AT (ld_trampoline_load)
{ {
_ld_trampoline_start = .; ld_trampoline_start = .;
*(.trampoline_reset); *(.trampoline_reset);
. = ALIGN(4); . = ALIGN(4);
_ld_trampoline_end = .; ld_trampoline_end = .;
} > lowram } > lowram
_ld_trampoline_size = _ld_trampoline_end - _ld_trampoline_start; ld_trampoline_size = ld_trampoline_end - ld_trampoline_start;
.data (_ld_trampoline_load + _ld_trampoline_size): .data (ld_trampoline_load + ld_trampoline_size):
{ {
*(.data) ; *(.data) ;
*(.data*) ; *(.data*) ;
@ -79,12 +79,12 @@ SECTIONS
.bss (NOLOAD): .bss (NOLOAD):
{ {
. = ALIGN(4) ; . = ALIGN(4) ;
_ld_bss_start = . ; ld_bss_start = . ;
*(.bss) ; *(.bss) ;
*(.bss*) ; *(.bss*) ;
*(COMMON) ; *(COMMON) ;
. = ALIGN(4) ; . = ALIGN(4) ;
_ld_bss_end = . ; ld_bss_end = . ;
} > ram } > ram
_ld_ram_size = LENGTH(ram) ; _ld_ram_size = LENGTH(ram) ;

6
hypervisor/include/arch/x86/apicreg.h
View File

@ -26,8 +26,8 @@
* $FreeBSD$ * $FreeBSD$
*/ */
#ifndef _APICREG_H_ #ifndef APICREG_H
#define _APICREG_H_ #define APICREG_H
/* /*
* Local && I/O APIC definitions. * Local && I/O APIC definitions.
@ -432,4 +432,4 @@ union ioapic_rte {
#define IOAPIC_RTE_INTVEC 0x000000ffUL /*R/W: INT vector field*/ #define IOAPIC_RTE_INTVEC 0x000000ffUL /*R/W: INT vector field*/
#endif /* _APICREG_H_ */ #endif /* APICREG_H */

4
hypervisor/include/arch/x86/cpu.h
View File

@ -216,8 +216,8 @@ enum cpu_reg_name {
/**********************************/ /**********************************/
/* EXTERNAL VARIABLES */ /* EXTERNAL VARIABLES */
/**********************************/ /**********************************/
extern uint8_t _ld_bss_start; extern uint8_t ld_bss_start;
extern uint8_t _ld_bss_end; extern uint8_t ld_bss_end;
/* In trampoline range, hold the jump target which trampline will jump to */ /* In trampoline range, hold the jump target which trampline will jump to */
extern uint64_t main_entry[1]; extern uint64_t main_entry[1];

6
hypervisor/include/arch/x86/cpufeatures.h
View File

@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __X86_CPUFEATURES_H__ #ifndef CPUFEATURES_H
#define __X86_CPUFEATURES_H__ #define CPUFEATURES_H
/* Intel-defined CPU features, CPUID level 0x00000001 (ECX)*/ /* Intel-defined CPU features, CPUID level 0x00000001 (ECX)*/
#define X86_FEATURE_SSE3 ((FEAT_1_ECX << 5U) + 0U) #define X86_FEATURE_SSE3 ((FEAT_1_ECX << 5U) + 0U)
@ -83,4 +83,4 @@
#define X86_FEATURE_PAGE1GB ((FEAT_8000_0001_EDX << 5U) + 26U) #define X86_FEATURE_PAGE1GB ((FEAT_8000_0001_EDX << 5U) + 26U)
#define X86_FEATURE_LM ((FEAT_8000_0001_EDX << 5U) + 29U) #define X86_FEATURE_LM ((FEAT_8000_0001_EDX << 5U) + 29U)
#endif /*__X86_CPUFEATURES_H__*/ #endif /* CPUFEATURES_H */

10
hypervisor/include/arch/x86/guest/gpr.h
View File

@ -1,10 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _VGPR_H_
#define _VGPR_H_
#endif

6
hypervisor/include/arch/x86/guest/ucode.h
View File

@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef _ARCH_X86_UCODE_H #ifndef UCODE_H
#define _ARCH_X86_UCODE_H #define UCODE_H
struct ucode_header { struct ucode_header {
uint32_t header_ver; uint32_t header_ver;
@ -23,4 +23,4 @@ struct ucode_header {
void acrn_update_ucode(struct vcpu *vcpu, uint64_t v); void acrn_update_ucode(struct vcpu *vcpu, uint64_t v);
uint64_t get_microcode_version(void); uint64_t get_microcode_version(void);
#endif #endif /* UCODE_H */

11
hypervisor/include/arch/x86/guest/vcpu.h
View File

@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef _VCPU_H_ #ifndef VCPU_H
#define _VCPU_H_ #define VCPU_H
#define ACRN_VCPU_MMIO_COMPLETE (0U) #define ACRN_VCPU_MMIO_COMPLETE (0U)
@ -47,7 +47,6 @@
#ifndef ASSEMBLER #ifndef ASSEMBLER
#include <guest.h> #include <guest.h>
#include <gpr.h>
enum vcpu_state { enum vcpu_state {
VCPU_INIT, VCPU_INIT,
@ -239,7 +238,7 @@ struct vcpu {
uint64_t guest_msrs[IDX_MAX_MSR]; uint64_t guest_msrs[IDX_MAX_MSR];
#ifdef CONFIG_MTRR_ENABLED #ifdef CONFIG_MTRR_ENABLED
struct mtrr_state mtrr; struct mtrr_state mtrr;
#endif #endif /* CONFIG_MTRR_ENABLED */
uint64_t reg_cached; uint64_t reg_cached;
uint64_t reg_updated; uint64_t reg_updated;
} __aligned(CPU_PAGE_SIZE); } __aligned(CPU_PAGE_SIZE);
@ -303,6 +302,6 @@ int prepare_vcpu(struct vm *vm, uint16_t pcpu_id);
void request_vcpu_pre_work(struct vcpu *vcpu, uint16_t pre_work_id); void request_vcpu_pre_work(struct vcpu *vcpu, uint16_t pre_work_id);
void vcpu_dumpreg(void *data); void vcpu_dumpreg(void *data);
#endif #endif /* ASSEMBLER */
#endif #endif /* VCPU_H */

6
hypervisor/include/arch/x86/guest/vioapic.h
View File

@ -28,8 +28,8 @@
* $FreeBSD$ * $FreeBSD$
*/ */
#ifndef _VIOAPIC_H_ #ifndef VIOAPIC_H
#define _VIOAPIC_H_ #define VIOAPIC_H
#include <apicreg.h> #include <apicreg.h>
@ -65,4 +65,4 @@ int vioapic_mmio_access_handler(struct vcpu *vcpu,
void get_vioapic_info(char *str_arg, size_t str_max, uint16_t vmid); void get_vioapic_info(char *str_arg, size_t str_max, uint16_t vmid);
#endif /* HV_DEBUG */ #endif /* HV_DEBUG */
#endif #endif /* VIOAPIC_H */

6
hypervisor/include/arch/x86/guest/vlapic.h
View File

@ -27,8 +27,8 @@
* $FreeBSD$ * $FreeBSD$
*/ */
#ifndef _VLAPIC_H_ #ifndef VLAPIC_H
#define _VLAPIC_H_ #define VLAPIC_H
/* /*
* 16 priority levels with at most one vector injected per level. * 16 priority levels with at most one vector injected per level.
@ -186,4 +186,4 @@ int apic_write_vmexit_handler(struct vcpu *vcpu);
int veoi_vmexit_handler(struct vcpu *vcpu); int veoi_vmexit_handler(struct vcpu *vcpu);
int tpr_below_threshold_vmexit_handler(__unused struct vcpu *vcpu); int tpr_below_threshold_vmexit_handler(__unused struct vcpu *vcpu);
void calcvdest(struct vm *vm, uint64_t *dmask, uint32_t dest, bool phys); void calcvdest(struct vm *vm, uint64_t *dmask, uint32_t dest, bool phys);
#endif /* _VLAPIC_H_ */ #endif /* VLAPIC_H */

7
hypervisor/include/arch/x86/guest/vm.h
View File

@ -146,13 +146,6 @@ struct vm {
* when vm is active. So no lock needed * when vm is active. So no lock needed
*/ */
struct _vm_shared_memory *shared_memory_area;
struct {
struct _vm_virtual_device_node *head;
struct _vm_virtual_device_node *tail;
} virtual_device_list;
unsigned char GUID[16]; unsigned char GUID[16];
struct secure_world_control sworld_control; struct secure_world_control sworld_control;

1
hypervisor/include/arch/x86/guest/vm0_boot.h
View File

@ -26,7 +26,6 @@
#define BOOT_CTX_EFER_HIGH_OFFSET 204 #define BOOT_CTX_EFER_HIGH_OFFSET 204
#define SIZE_OF_BOOT_CTX 296 #define SIZE_OF_BOOT_CTX 296
#else #else
#include <gpr.h>
#define BOOT_CTX_CR0_OFFSET 176U #define BOOT_CTX_CR0_OFFSET 176U
#define BOOT_CTX_CR3_OFFSET 192U #define BOOT_CTX_CR3_OFFSET 192U
#define BOOT_CTX_CR4_OFFSET 184U #define BOOT_CTX_CR4_OFFSET 184U

6
hypervisor/include/arch/x86/guest/vpic.h
View File

@ -27,8 +27,8 @@
* $FreeBSD$ * $FreeBSD$
*/ */
#ifndef _VPIC_H_ #ifndef VPIC_H
#define _VPIC_H_ #define VPIC_H
#define ICU_IMR_OFFSET 1U #define ICU_IMR_OFFSET 1U
@ -129,4 +129,4 @@ void vpic_get_irq_trigger(struct vm *vm, uint32_t irq,
enum vpic_trigger *trigger); enum vpic_trigger *trigger);
uint32_t vpic_pincount(void); uint32_t vpic_pincount(void);
#endif /* _VPIC_H_ */ #endif /* VPIC_H */

7
hypervisor/include/arch/x86/host_pm.h
View File

@ -11,10 +11,9 @@
extern uint8_t host_enter_s3_success; extern uint8_t host_enter_s3_success;
int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val, int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);
uint32_t pm1b_cnt_val); extern void asm_enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
extern void __enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
uint32_t pm1b_cnt_val); uint32_t pm1b_cnt_val);
extern void restore_s3_context(void); extern void restore_s3_context(void);
#endif /* ARCH_X86_PM_H */ #endif /* HOST_PM_H */

6
hypervisor/include/common/schedule.h
View File

@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef _HV_CORE_SCHEDULE_ #ifndef SCHEDULE_H
#define _HV_CORE_SCHEDULE_ #define SCHEDULE_H
#define NEED_RESCHEDULE (1U) #define NEED_RESCHEDULE (1U)
#define NEED_OFFLINE (2U) #define NEED_OFFLINE (2U)
@ -39,5 +39,5 @@ int need_offline(uint16_t pcpu_id);
void schedule(void); void schedule(void);
void vcpu_thread(struct vcpu *vcpu); void vcpu_thread(struct vcpu *vcpu);
#endif #endif /* SCHEDULE_H */

8
hypervisor/include/debug/vuart.h
View File

@ -27,8 +27,8 @@
* $FreeBSD$ * $FreeBSD$
*/ */
#ifndef _VUART_H_ #ifndef VUART_H
#define _VUART_H_ #define VUART_H
#define RX_BUF_SIZE 256U #define RX_BUF_SIZE 256U
#define TX_BUF_SIZE 8192U #define TX_BUF_SIZE 8192U
@ -83,6 +83,6 @@ static inline struct acrn_vuart *vuart_console_active(void)
} }
static inline void vuart_console_tx_chars(__unused struct acrn_vuart *vu) {} static inline void vuart_console_tx_chars(__unused struct acrn_vuart *vu) {}
static inline void vuart_console_rx_chars(__unused struct acrn_vuart *vu) {} static inline void vuart_console_rx_chars(__unused struct acrn_vuart *vu) {}
#endif /*HV_DEBUG*/ #endif /* HV_DEBUG */
#endif #endif /* VUART_H */

6
hypervisor/include/lib/mem_mgt.h
View File

@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __MEM_MGT_H__ #ifndef MEM_MGT_H
#define __MEM_MGT_H__ #define MEM_MGT_H
/* Macros */ /* Macros */
#define BITMAP_WORD_SIZE 32U #define BITMAP_WORD_SIZE 32U
@ -28,4 +28,4 @@ void *alloc_page(void);
void *alloc_pages(unsigned int page_num); void *alloc_pages(unsigned int page_num);
void free(void *ptr); void free(void *ptr);
#endif /* MEM_MGT_H_ */ #endif /* MEM_MGT_H */