mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-07-29 06:28:19 +00:00
hv: fix 'User name starts with underscore'
There are chances that names with leading underscore declared by developers are conflict with the ones reserved for the compiler. What this patch does: - rename these functions/variables/macros starting with underscore to avoid such unintentational mistakes. - remove gpr.h without any contents Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao
Xie, Nanlin
parent
390861a04c
commit
4544d28ee1
@ -388,8 +388,8 @@ void bsp_boot_init(void)
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start_tsc = rdtsc();
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/* Clear BSS */
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(void)memset(&_ld_bss_start, 0U,
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(size_t)(&_ld_bss_end - &_ld_bss_start));
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(void)memset(&ld_bss_start, 0U,
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(size_t)(&ld_bss_end - &ld_bss_start));
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bitmap_set_nolock(BOOT_CPU_ID, &pcpu_active_bitmap);
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@ -131,7 +131,7 @@ cpu_primary_start_64:
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primary_start_long_mode:
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/* Initialize temporary stack pointer */
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lea _ld_bss_end(%rip), %rsp
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lea ld_bss_end(%rip), %rsp
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/*0x1000 = CPU_PAGE_SIZE*/
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add $0x1000,%rsp
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/* 16 = CPU_STACK_ALIGN */
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@ -142,7 +142,7 @@ primary_start_long_mode:
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* Notes: this includes the fixup to IDT tables and temporary
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* page tables
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*/
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call _relocate
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call relocate
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/* Load temportary GDT pointer value */
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lea cpu_primary32_gdt_ptr(%rip), %rbx
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@ -172,7 +172,7 @@ after:
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/*
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* Fix up the IDT desciptors
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* The relocation delta in IDT tables has been fixed in _relocate()
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* The relocation delta in IDT tables has been fixed in relocate()
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*/
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leal HOST_IDT(%rip), %edx
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movl $HOST_IDT_ENTRIES, %ecx
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@ -27,8 +27,8 @@
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* $FreeBSD$
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*/
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#ifndef _VLAPIC_PRIV_H_
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#define _VLAPIC_PRIV_H_
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#ifndef VLAPIC_PRIV_H
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#define VLAPIC_PRIV_H
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/*
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* APIC Register: Offset Description
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@ -82,4 +82,4 @@
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#define APIC_OFFSET_TIMER_DCR 0x3E0U /* Timer's Divide Configuration */
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#endif /* _VLAPIC_PRIV_H_ */
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#endif /* VLAPIC_PRIV_H */
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@ -59,7 +59,7 @@ static uint16_t vmx_vpid_nr = VMX_MIN_NR_VPID;
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struct invept_desc {
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uint64_t eptp;
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uint64_t _res;
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uint64_t res;
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};
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static inline void local_invvpid(uint64_t type, uint16_t vpid, uint64_t gva)
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@ -56,7 +56,7 @@ static int split_large_page(uint64_t *pte,
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return 0;
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}
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static inline void __modify_or_del_pte(uint64_t *pte,
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static inline void local_modify_or_del_pte(uint64_t *pte,
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uint64_t prot_set, uint64_t prot_clr, uint32_t type)
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{
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if (type == MR_MODIFY) {
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@ -111,7 +111,7 @@ static int modify_or_del_pte(uint64_t *pde,
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return -EFAULT;
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}
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__modify_or_del_pte(pte, prot_set, prot_clr, type);
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local_modify_or_del_pte(pte, prot_set, prot_clr, type);
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vaddr += PTE_SIZE;
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if (vaddr >= vaddr_end) {
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break;
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@ -156,7 +156,7 @@ static int modify_or_del_pde(uint64_t *pdpte,
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return ret;
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}
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} else {
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__modify_or_del_pte(pde,
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local_modify_or_del_pte(pde,
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prot_set, prot_clr, type);
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if (vaddr_next < vaddr_end) {
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vaddr = vaddr_next;
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@ -211,7 +211,7 @@ static int modify_or_del_pdpte(uint64_t *pml4e,
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return ret;
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}
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} else {
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__modify_or_del_pte(pdpte,
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local_modify_or_del_pte(pdpte,
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prot_set, prot_clr, type);
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if (vaddr_next < vaddr_end) {
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vaddr = vaddr_next;
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@ -123,7 +123,7 @@ int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
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suspend_iommu();
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suspend_lapic();
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__enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
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asm_enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
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/* release the lock aquired in trampoline code */
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spinlock_release(&trampoline_spinlock);
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@ -38,7 +38,7 @@
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*/
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.extern cpu_secondary_init
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.extern _ld_bss_end
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.extern ld_bss_end
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.extern HOST_GDTR
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.section .trampoline_reset,"ax"
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@ -248,7 +248,7 @@ int vcpu_queue_exception(struct vcpu *vcpu, uint32_t vector,
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return 0;
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}
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static void _vcpu_inject_exception(struct vcpu *vcpu, uint32_t vector)
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static void vcpu_inject_exception(struct vcpu *vcpu, uint32_t vector)
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{
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if ((exception_type[vector] & EXCEPTION_ERROR_CODE_VALID) != 0U) {
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exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE,
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@ -266,7 +266,7 @@ static int vcpu_inject_hi_exception(struct vcpu *vcpu)
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uint32_t vector = vcpu->arch_vcpu.exception_info.exception;
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if (vector == IDT_MC || vector == IDT_BP || vector == IDT_DB) {
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_vcpu_inject_exception(vcpu, vector);
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vcpu_inject_exception(vcpu, vector);
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return 1;
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}
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@ -279,7 +279,7 @@ static int vcpu_inject_lo_exception(struct vcpu *vcpu)
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/* high priority exception already be injected */
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if (vector <= NR_MAX_VECTOR) {
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_vcpu_inject_exception(vcpu, vector);
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vcpu_inject_exception(vcpu, vector);
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return 1;
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}
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@ -30,8 +30,8 @@
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.extern do_acpi_s3
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.extern trampoline_spinlock
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.global __enter_s3
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__enter_s3:
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.global asm_enter_s3
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asm_enter_s3:
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/*
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* 0U=0x0=CPU_CONTEXT_OFFSET_RAX
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* 8U=0x8=CPU_CONTEXT_OFFSET_RCX
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@ -6,7 +6,7 @@
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#ifndef RELOCATE_H
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#define RELOCATE_H
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extern void _relocate(void);
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extern void relocate(void);
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extern uint64_t get_hv_image_delta(void);
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extern uint64_t get_hv_image_base(void);
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extern uint64_t read_trampoline_sym(void *sym);
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@ -15,10 +15,10 @@ extern uint64_t prepare_trampoline(void);
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/* external symbols that are helpful for relocation */
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extern uint8_t _DYNAMIC[1];
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extern const uint8_t _ld_trampoline_load;
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extern uint8_t _ld_trampoline_start;
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extern uint8_t _ld_trampoline_end;
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extern const uint64_t _ld_trampoline_size;
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extern const uint8_t ld_trampoline_load;
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extern uint8_t ld_trampoline_start;
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extern uint8_t ld_trampoline_end;
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extern const uint64_t ld_trampoline_size;
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extern uint8_t cpu_primary_start_32;
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extern uint8_t cpu_primary_start_64;
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@ -70,7 +70,7 @@ static uint64_t trampoline_relo_addr(void *addr)
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return (uint64_t)addr - get_hv_image_delta();
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}
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void _relocate(void)
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void relocate(void)
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{
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#ifdef CONFIG_RELOC
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struct Elf64_Dyn *dyn;
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@ -108,7 +108,7 @@ void _relocate(void)
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* Need to subtract the relocation delta to get the correct
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* absolute addresses
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*/
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trampoline_end = (uint64_t)(&_ld_trampoline_end) - delta;
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trampoline_end = (uint64_t)(&ld_trampoline_end) - delta;
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primary_32_start = (uint64_t)(&cpu_primary_start_32) - delta;
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primary_32_end = (uint64_t)(&cpu_primary_start_64) - delta;
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@ -214,7 +214,7 @@ uint64_t prepare_trampoline(void)
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{
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uint64_t size, dest_pa;
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size = (uint64_t)(&_ld_trampoline_end - &_ld_trampoline_start);
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size = (uint64_t)(&ld_trampoline_end - &ld_trampoline_start);
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#ifndef CONFIG_EFI_STUB
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dest_pa = e820_alloc_low_memory(CONFIG_LOW_RAM_SIZE);
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#else
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@ -224,7 +224,7 @@ uint64_t prepare_trampoline(void)
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pr_dbg("trampoline code: %llx size %x", dest_pa, size);
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/* Copy segment for AP initialization code below 1MB */
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(void)memcpy_s(hpa2hva(dest_pa), (size_t)size, &_ld_trampoline_load,
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(void)memcpy_s(hpa2hva(dest_pa), (size_t)size, &ld_trampoline_load,
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(size_t)size);
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update_trampoline_code_refs(dest_pa);
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trampoline_start16_paddr = dest_pa;
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@ -46,20 +46,20 @@ SECTIONS
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} > ram
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. = ALIGN(4) ;
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_ld_trampoline_load = .;
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ld_trampoline_load = .;
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.trampoline : AT (_ld_trampoline_load)
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.trampoline : AT (ld_trampoline_load)
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{
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_ld_trampoline_start = .;
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ld_trampoline_start = .;
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*(.trampoline_reset);
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. = ALIGN(4);
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_ld_trampoline_end = .;
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ld_trampoline_end = .;
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} > lowram
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_ld_trampoline_size = _ld_trampoline_end - _ld_trampoline_start;
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ld_trampoline_size = ld_trampoline_end - ld_trampoline_start;
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.data (_ld_trampoline_load + _ld_trampoline_size):
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.data (ld_trampoline_load + ld_trampoline_size):
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{
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*(.data) ;
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*(.data*) ;
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@ -79,12 +79,12 @@ SECTIONS
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.bss (NOLOAD):
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{
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. = ALIGN(4) ;
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_ld_bss_start = . ;
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ld_bss_start = . ;
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*(.bss) ;
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*(.bss*) ;
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*(COMMON) ;
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. = ALIGN(4) ;
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_ld_bss_end = . ;
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ld_bss_end = . ;
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} > ram
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_ld_ram_size = LENGTH(ram) ;
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@ -26,8 +26,8 @@
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* $FreeBSD$
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*/
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#ifndef _APICREG_H_
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#define _APICREG_H_
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#ifndef APICREG_H
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#define APICREG_H
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/*
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* Local && I/O APIC definitions.
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@ -432,4 +432,4 @@ union ioapic_rte {
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#define IOAPIC_RTE_INTVEC 0x000000ffUL /*R/W: INT vector field*/
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#endif /* _APICREG_H_ */
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#endif /* APICREG_H */
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@ -216,8 +216,8 @@ enum cpu_reg_name {
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/**********************************/
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/* EXTERNAL VARIABLES */
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/**********************************/
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extern uint8_t _ld_bss_start;
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extern uint8_t _ld_bss_end;
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extern uint8_t ld_bss_start;
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extern uint8_t ld_bss_end;
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/* In trampoline range, hold the jump target which trampline will jump to */
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extern uint64_t main_entry[1];
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@ -4,8 +4,8 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __X86_CPUFEATURES_H__
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#define __X86_CPUFEATURES_H__
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#ifndef CPUFEATURES_H
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#define CPUFEATURES_H
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/* Intel-defined CPU features, CPUID level 0x00000001 (ECX)*/
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#define X86_FEATURE_SSE3 ((FEAT_1_ECX << 5U) + 0U)
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@ -83,4 +83,4 @@
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#define X86_FEATURE_PAGE1GB ((FEAT_8000_0001_EDX << 5U) + 26U)
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#define X86_FEATURE_LM ((FEAT_8000_0001_EDX << 5U) + 29U)
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#endif /*__X86_CPUFEATURES_H__*/
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#endif /* CPUFEATURES_H */
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@ -1,10 +0,0 @@
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _VGPR_H_
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#define _VGPR_H_
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#endif
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@ -4,8 +4,8 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _ARCH_X86_UCODE_H
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#define _ARCH_X86_UCODE_H
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#ifndef UCODE_H
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#define UCODE_H
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struct ucode_header {
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uint32_t header_ver;
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@ -23,4 +23,4 @@ struct ucode_header {
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void acrn_update_ucode(struct vcpu *vcpu, uint64_t v);
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uint64_t get_microcode_version(void);
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#endif
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#endif /* UCODE_H */
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@ -4,8 +4,8 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _VCPU_H_
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#define _VCPU_H_
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#ifndef VCPU_H
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#define VCPU_H
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#define ACRN_VCPU_MMIO_COMPLETE (0U)
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@ -47,7 +47,6 @@
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#ifndef ASSEMBLER
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#include <guest.h>
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#include <gpr.h>
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enum vcpu_state {
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VCPU_INIT,
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@ -239,7 +238,7 @@ struct vcpu {
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uint64_t guest_msrs[IDX_MAX_MSR];
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#ifdef CONFIG_MTRR_ENABLED
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struct mtrr_state mtrr;
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#endif
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#endif /* CONFIG_MTRR_ENABLED */
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uint64_t reg_cached;
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uint64_t reg_updated;
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} __aligned(CPU_PAGE_SIZE);
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@ -303,6 +302,6 @@ int prepare_vcpu(struct vm *vm, uint16_t pcpu_id);
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void request_vcpu_pre_work(struct vcpu *vcpu, uint16_t pre_work_id);
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void vcpu_dumpreg(void *data);
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#endif
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#endif /* ASSEMBLER */
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#endif
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#endif /* VCPU_H */
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@ -28,8 +28,8 @@
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* $FreeBSD$
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*/
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#ifndef _VIOAPIC_H_
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#define _VIOAPIC_H_
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#ifndef VIOAPIC_H
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#define VIOAPIC_H
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#include <apicreg.h>
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@ -65,4 +65,4 @@ int vioapic_mmio_access_handler(struct vcpu *vcpu,
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void get_vioapic_info(char *str_arg, size_t str_max, uint16_t vmid);
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#endif /* HV_DEBUG */
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#endif
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#endif /* VIOAPIC_H */
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@ -27,8 +27,8 @@
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* $FreeBSD$
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*/
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#ifndef _VLAPIC_H_
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#define _VLAPIC_H_
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#ifndef VLAPIC_H
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#define VLAPIC_H
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/*
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* 16 priority levels with at most one vector injected per level.
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@ -186,4 +186,4 @@ int apic_write_vmexit_handler(struct vcpu *vcpu);
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int veoi_vmexit_handler(struct vcpu *vcpu);
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int tpr_below_threshold_vmexit_handler(__unused struct vcpu *vcpu);
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void calcvdest(struct vm *vm, uint64_t *dmask, uint32_t dest, bool phys);
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#endif /* _VLAPIC_H_ */
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#endif /* VLAPIC_H */
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@ -146,13 +146,6 @@ struct vm {
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* when vm is active. So no lock needed
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*/
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struct _vm_shared_memory *shared_memory_area;
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struct {
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struct _vm_virtual_device_node *head;
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struct _vm_virtual_device_node *tail;
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} virtual_device_list;
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unsigned char GUID[16];
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struct secure_world_control sworld_control;
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@ -26,7 +26,6 @@
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#define BOOT_CTX_EFER_HIGH_OFFSET 204
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#define SIZE_OF_BOOT_CTX 296
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#else
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#include <gpr.h>
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#define BOOT_CTX_CR0_OFFSET 176U
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#define BOOT_CTX_CR3_OFFSET 192U
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#define BOOT_CTX_CR4_OFFSET 184U
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@ -27,8 +27,8 @@
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* $FreeBSD$
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*/
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#ifndef _VPIC_H_
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#define _VPIC_H_
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#ifndef VPIC_H
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#define VPIC_H
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|
||||
#define ICU_IMR_OFFSET 1U
|
||||
|
||||
@ -129,4 +129,4 @@ void vpic_get_irq_trigger(struct vm *vm, uint32_t irq,
|
||||
enum vpic_trigger *trigger);
|
||||
uint32_t vpic_pincount(void);
|
||||
|
||||
#endif /* _VPIC_H_ */
|
||||
#endif /* VPIC_H */
|
||||
|
||||
@ -11,10 +11,9 @@
|
||||
|
||||
extern uint8_t host_enter_s3_success;
|
||||
|
||||
int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
|
||||
uint32_t pm1b_cnt_val);
|
||||
extern void __enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
|
||||
int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);
|
||||
extern void asm_enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
|
||||
uint32_t pm1b_cnt_val);
|
||||
extern void restore_s3_context(void);
|
||||
|
||||
#endif /* ARCH_X86_PM_H */
|
||||
#endif /* HOST_PM_H */
|
||||
|
||||
@ -4,8 +4,8 @@
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _HV_CORE_SCHEDULE_
|
||||
#define _HV_CORE_SCHEDULE_
|
||||
#ifndef SCHEDULE_H
|
||||
#define SCHEDULE_H
|
||||
|
||||
#define NEED_RESCHEDULE (1U)
|
||||
#define NEED_OFFLINE (2U)
|
||||
@ -39,5 +39,5 @@ int need_offline(uint16_t pcpu_id);
|
||||
void schedule(void);
|
||||
|
||||
void vcpu_thread(struct vcpu *vcpu);
|
||||
#endif
|
||||
#endif /* SCHEDULE_H */
|
||||
|
||||
|
||||
@ -27,8 +27,8 @@
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _VUART_H_
|
||||
#define _VUART_H_
|
||||
#ifndef VUART_H
|
||||
#define VUART_H
|
||||
|
||||
#define RX_BUF_SIZE 256U
|
||||
#define TX_BUF_SIZE 8192U
|
||||
@ -85,4 +85,4 @@ static inline void vuart_console_tx_chars(__unused struct acrn_vuart *vu) {}
|
||||
static inline void vuart_console_rx_chars(__unused struct acrn_vuart *vu) {}
|
||||
#endif /* HV_DEBUG */
|
||||
|
||||
#endif
|
||||
#endif /* VUART_H */
|
||||
|
||||
@ -4,8 +4,8 @@
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef __MEM_MGT_H__
|
||||
#define __MEM_MGT_H__
|
||||
#ifndef MEM_MGT_H
|
||||
#define MEM_MGT_H
|
||||
|
||||
/* Macros */
|
||||
#define BITMAP_WORD_SIZE 32U
|
||||
@ -28,4 +28,4 @@ void *alloc_page(void);
|
||||
void *alloc_pages(unsigned int page_num);
|
||||
void free(void *ptr);
|
||||
|
||||
#endif /* MEM_MGT_H_ */
|
||||
#endif /* MEM_MGT_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user