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HV: correct apic lvt reset value

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Per SDM 10.4.7.1 vol3, the LVT register should be reset to 0s except for the
mask bits are set to 1s.

In current code, the lvt_last[] has been set to correct value(i.e. 0x10000) in
vlapic_reset() before enforce setting vlapic->lvt_last[i] to 0U, add the loop
that set vlapic->lvt_last[i] to 0 would lead to get zero when read LVT regs
after reset, which is incompiant with SDM;

Tracked-On: #4266
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun 2019-08-17 01:57:03 +08:00 committed by wenlingz
parent d4bf019ddd
commit 46ed0b1582
1 changed files with 0 additions and 5 deletions
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5
hypervisor/arch/x86/guest/vlapic.c
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@ -1643,7 +1643,6 @@ static int32_t vlapic_write(struct acrn_vlapic *vlapic, uint32_t offset, uint64_
void
vlapic_reset(struct acrn_vlapic *vlapic, const struct acrn_apicv_ops *ops)
{
uint32_t i;
struct lapic_regs *lapic;
/*
@ -1674,10 +1673,6 @@ vlapic_reset(struct acrn_vlapic *vlapic, const struct acrn_apicv_ops *ops)
vlapic->svr_last = lapic->svr.v;
for (i = 0U; i < (VLAPIC_MAXLVT_INDEX + 1U); i++) {
vlapic->lvt_last[i] = 0U;
}
vlapic->isrv = 0U;
vlapic->ops = ops;