From 471fb85ba92457be45db02504dd84b34e85c56ee Mon Sep 17 00:00:00 2001
From: Yifan Liu <yifan1.liu@intel.com>
Date: Mon, 20 Oct 2025 10:47:27 +0000
Subject: [PATCH] hv: riscv: Add dummy vsbi base implementation

Tracked-On: #8841
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
---
 hypervisor/arch/riscv/Makefile                |  1 +
 hypervisor/arch/riscv/guest/vsbi.c            |  5 +-
 hypervisor/arch/riscv/guest/vsbi/vsbi_base.c  | 49 +++++++++++++++++++
 .../include/arch/riscv/asm/guest/vsbi.h       |  1 +
 4 files changed, 54 insertions(+), 2 deletions(-)
 create mode 100644 hypervisor/arch/riscv/guest/vsbi/vsbi_base.c

diff --git a/hypervisor/arch/riscv/Makefile b/hypervisor/arch/riscv/Makefile
index 54c81086a..7571fb0b6 100644
--- a/hypervisor/arch/riscv/Makefile
+++ b/hypervisor/arch/riscv/Makefile
@@ -71,6 +71,7 @@ VP_C_SRCS += arch/riscv/guest/vcpu.c
 VP_C_SRCS += arch/riscv/guest/vm.c
 VP_C_SRCS += arch/riscv/guest/vcpu_exit.c
 VP_C_SRCS += arch/riscv/guest/vsbi.c
+VP_C_SRCS += arch/riscv/guest/vsbi/vsbi_base.c
 
 VM_CFG_C_SRCS += $(SCENARIO_CFG_DIR)/vm_configurations.c
 VM_CFG_C_SRCS += $(BOARD_CFG_DIR)/pci_dev.c
diff --git a/hypervisor/arch/riscv/guest/vsbi.c b/hypervisor/arch/riscv/guest/vsbi.c
index e8bc919fa..13a41031c 100644
--- a/hypervisor/arch/riscv/guest/vsbi.c
+++ b/hypervisor/arch/riscv/guest/vsbi.c
@@ -19,7 +19,7 @@
 #include <asm/sbi.h>
 #include <asm/guest/vsbi.h>
 
-static const struct acrn_vsbi_extension *vcpu_find_extension(struct acrn_vcpu *vcpu, uint64_t eid)
+const struct acrn_vsbi_extension *vcpu_find_extension(struct acrn_vcpu *vcpu, uint64_t eid)
 {
 	const struct acrn_vsbi_extension *e, *ret = NULL;
 	struct acrn_vm *vm = vcpu->vm;
@@ -71,8 +71,9 @@ int32_t vsbi_exit_handler(struct acrn_vcpu *vcpu)
 	return 0;
 }
 
+extern const struct acrn_vsbi_extension vsbi_ext_base;
 static const struct acrn_vsbi_extension *vsbi_extensions[MAX_NUM_SUPPORTED_VSBI_EXT] = {
-	NULL,
+	&vsbi_ext_base,
 };
 
 void init_vsbi(struct acrn_vm *vm)
diff --git a/hypervisor/arch/riscv/guest/vsbi/vsbi_base.c b/hypervisor/arch/riscv/guest/vsbi/vsbi_base.c
new file mode 100644
index 000000000..10d41c8f6
--- /dev/null
+++ b/hypervisor/arch/riscv/guest/vsbi/vsbi_base.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2018-2025 Intel Corporation.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <types.h>
+#include <vcpu.h>
+#include <vm.h>
+
+#include <asm/sbi.h>
+#include <asm/guest/vsbi.h>
+
+static int32_t vcpu_sbi_base_ecall_handler(struct acrn_vcpu *vcpu, __unused uint64_t ext_id,
+			       uint64_t func_id, uint64_t *args, struct vsbi_ret *out)
+{
+	int ret = SBI_SUCCESS;
+	sbiret r;
+	const struct acrn_vsbi_extension *e;
+
+	switch (func_id) {
+	case SBI_BASE_FID_GET_SPEC_VERSION:
+	case SBI_BASE_FID_GET_IMP_VERSION:
+	case SBI_BASE_FID_GET_IMP_ID:
+	case SBI_BASE_FID_GET_MVENDORID:
+	case SBI_BASE_FID_GET_MARCHID:
+	case SBI_BASE_FID_GET_MIMPID:
+		/* TODO: Dummy. For now just passthrough everything */
+		r = sbi_ecall(0, 0, 0, 0, 0, 0, func_id, SBI_EID_BASE);
+		ret = r.error;
+		out->value = r.value;
+		break;
+	case SBI_BASE_FID_PROBE_EXT:
+		e = vcpu_find_extension(vcpu, args[0]);
+		out->value = (e == NULL) ? 0 : 1;
+		break;
+	default:
+		ret = SBI_ERR_NOT_SUPPORTED;
+	}
+
+	return ret;
+}
+
+const struct acrn_vsbi_extension vsbi_ext_base = {
+	.name = "base",
+	.eid_start = SBI_EID_BASE,
+	.eid_end = SBI_EID_BASE,
+	.handler = vcpu_sbi_base_ecall_handler,
+};
diff --git a/hypervisor/include/arch/riscv/asm/guest/vsbi.h b/hypervisor/include/arch/riscv/asm/guest/vsbi.h
index d578127c2..6cec8467f 100644
--- a/hypervisor/include/arch/riscv/asm/guest/vsbi.h
+++ b/hypervisor/include/arch/riscv/asm/guest/vsbi.h
@@ -29,5 +29,6 @@ struct acrn_vsbi_extension {
 
 int32_t vsbi_exit_handler(struct acrn_vcpu *vcpu);
 void init_vsbi(struct acrn_vm *vm);
+const struct acrn_vsbi_extension *vcpu_find_extension(struct acrn_vcpu *vcpu, uint64_t eid);
 
 #endif /* RISCV_VSBI_H */