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doc: remove hard-coded interfaces in .rst files
This patch removes hard-coded interfaces in .rst files and refers to the definition via doxygen style comments. This patch mainly focus on Hypervisor part. Other parts will be covered in seperate patches. Tracked-On: #1595 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
This commit is contained in:
Shiqing Gao
committed by
David Kinder
David Kinder
parent
ffb924542b
commit
474496fc0e
@@ -386,71 +386,29 @@ IOAPIC
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The following APIs are external interfaces for IOAPIC related
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operations.
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.. code-block:: c
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.. doxygengroup:: ioapic_ext_apis
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:project: Project ACRN
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:content-only:
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void ioapic_get_rte(uint32_t irq, union ioapic_rte *rte)
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/* get the redirection table entry of an irq. */
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void ioapic_set_rte(uint32_t irq, union ioapic_rte rte)
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/* Set the redirection table entry of an irq. */
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uint32_t pin_to_irq(uint8_t pin)
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/* Get irq num from physical irq pin num */
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void suspend_ioapic(void)
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/* Suspended ioapic, mainly save the RTEs. */
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void resume_ioapic(void)
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/* Resume ioapic, mainly restore the RTEs. */
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int get_ioapic_info(char *str_arg, int str_max_len)
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/* Dump information of ioapic for debug, such as irq num, pin,
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* RTE, vector, trigger mode etc. For debugging only.
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*/
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LAPIC
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=====
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The following APIs are external interfaces for LAPIC related operations.
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.. code-block:: c
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.. doxygengroup:: lapic_ext_apis
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:project: Project ACRN
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:content-only:
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void write_lapic_reg32(uint32_t offset, uint32_t value)
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/* Write to lapic register. */
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void early_init_lapic(void)
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/* To get the local apic base addr, map lapic registers and check the
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* xAPIC/x2APIC capability.
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*/
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void save_lapic(struct lapic_regs *regs)
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/* Save context of lapic before entering s3. */
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void restore_lapic(struct lapic_regs *regs)
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/* Restore context of lapic when resume from s3. */
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void resume_lapic(void)
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/* Resume lapic by setting the apic base addr and restore the registers. */
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uint8_t get_cur_lapic_id(void)
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/* Get the lapic id. */
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IPI
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===
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The following APIs are external interfaces for IPI related operations.
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.. code-block:: c
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void send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
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uint16_t dest_pcpu_id, uint64_t cpu_startup_start_address)
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/* Send an SIPI to a specific cpu, to notify the cpu to start booting. */
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void send_dest_ipi(uint32_t dest, uint32_t vector, uint32_t dest_mode)
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/* Send an IPI to a specific cpu with dest mode specified. */
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void send_single_ipi(uint16_t pcpu_id, uint32_t vector)
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/* Send an IPI to a specific cpu with physical dest mode. */
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.. doxygengroup:: ipi_ext_apis
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:project: Project ACRN
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:content-only:
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Physical Interrupt
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@@ -459,32 +417,7 @@ Physical Interrupt
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The following APIs are external interfaces for physical interrupt
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related operations.
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.. code-block:: c
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.. doxygengroup:: phys_int_ext_apis
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:project: Project ACRN
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:content-only:
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int32_t request_irq(uint32_t req_irq, irq_action_t action_fn, void *priv_data,
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uint32_t flags)
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/* Request interrupt num if not specified, and register irq action for the
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* specified/allocated irq.
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*/
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void free_irq(uint32_t irq)
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/* Free irq num and unregister the irq action. */
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void set_irq_trigger_mode(uint32_t irq, bool is_level_triggered)
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/* Set the irq trigger mode: edge-triggered or level-triggered */
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uint32_t irq_to_vector(uint32_t irq)
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/* Convert irq num to vector */
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void get_cpu_interrupt_info(char *str_arg, int str_max)
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/* To dump interrupt statistics info, such as irq num, vector,
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* irq count on each physical cpu.
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*/
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void dispatch_interrupt(struct intr_excp_ctx *ctx)
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/* To dispatch an interrupt, an action callback will be called if registered. */
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void init_interrupt(uint16_t pcpu_id)
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/* To do interrupt initialization for a cpu, will be called for
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* each physical cpu.
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*/
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@@ -165,20 +165,6 @@ of physical memory management.
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Data Flow of Hypervisor Physical Memory Management
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Data Structure Design
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=====================
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The page tables operation type:
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.. code-block:: c
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enum _page_table_type {
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PTT_HOST = 0, /* Operations for MMU page tables */
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PTT_EPT = 1, /* Operations for EPT page tables */
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PAGETABLE_TYPE_UNKNOWN, /* Page tables operation type is unknown */
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};
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Interfaces Design
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=================
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@@ -354,44 +340,18 @@ the memory virtualization unit.
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Data Structure Design
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=====================
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EPT Memory Type Data Definition:
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EPT Memory Type Definition:
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.. code-block:: c
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/* EPT memory type is specified in bits 5:3 of the last EPT
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* paging-structure entry */
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#define EPT_MT_SHIFT 3U
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/* EPT memory type is uncacheable */
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#define EPT_UNCACHED (0UL << EPT_MT_SHIFT)
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/* EPT memory type is write combining */
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#define EPT_WC (1UL << EPT_MT_SHIFT)
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/* EPT memory type is write through */
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#define EPT_WT (4UL << EPT_MT_SHIFT)
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/* EPT memory type is write protected */
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#define EPT_WP (5UL << EPT_MT_SHIFT)
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/* EPT memory type is write back */
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#define EPT_WB (6UL << EPT_MT_SHIFT)
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.. doxygengroup:: ept_mem_type
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:project: Project ACRN
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:content-only:
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EPT Memory Access Right Definition:
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.. code-block:: c
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.. doxygengroup:: ept_mem_access_right
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:project: Project ACRN
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:content-only:
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/* EPT memory access right is read-only */
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#define EPT_RD (1UL << 0U)
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/* EPT memory access right is read/write */
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#define EPT_WR (1UL << 1U)
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/* EPT memory access right is executable */
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#define EPT_EXE (1UL << 2U)
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/* EPT memory access right is read/write and executable */
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define EPT_RWX (EPT_RD | EPT_WR | EPT_EXE)
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Interfaces Design
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=================
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@@ -45,12 +45,9 @@ requests such as flush EPT.
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The eventid supported for virtual interrupt injection includes:
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.. code-block:: c
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#define ACRN_REQUEST_EXCP 0 /* request for exception injection */
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#define ACRN_REQUEST_EVENT 1 /* vLAPIC event */
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#define ACRN_REQUEST_EXTINT 2 /* external interrupt from vPIC */
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#define ACRN_REQUEST_NMI 3 /* non-maskable interrupt */
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.. doxygengroup:: virt_int_injection
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:project: Project ACRN
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:content-only:
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The *vcpu_make_request* is necessary for a virtual interrupt
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