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https://github.com/projectacrn/acrn-hypervisor.git
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dm: fix: TSN in multi-hostbridge could crash
fix bug: if PTM-CAP device, like TSN in multi-hostbridge could cause acrn-dm crash. original PTM PCI code has not handled multi-hostbridge case, and just handled hostbridge (00:00.0) case. this patch calls PCI access API to handle PTM-CAP device/bridge (root port) structure, to avoid scan PCI hierarchical. Tracked-On: #7045 Acked-by: Wang, Yu1 <yu1.wang@intel.com> Reviewed-by: Fei Li <fei1.li@intel.com> Signed-off-by: Minggui Cao <minggui.cao@intel.com>
This commit is contained in:
Minggui Cao
acrnsi-robot
parent
5d54b0d110
commit
483b7b1280
@ -1127,6 +1127,5 @@ fail:
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create_fail:
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uninit_hugetlb();
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deinit_loggers();
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clean_pci_cache();
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exit(ret);
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}
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@ -16,18 +16,6 @@
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#include "pci_util.h"
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#include "log.h"
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#define MAX_LEN (PCI_BUSMAX + 1)
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TAILQ_HEAD(ALL_PCI_DEVICES, pci_device_info);
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static struct ALL_PCI_DEVICES pci_device_q;
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static int pci_scanned;
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/* map bus to bridge
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* assume only one pci domain in the system so the
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* bus # in the pci hierarchy is unique.
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*/
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static struct pci_device_info *bus_map[MAX_LEN];
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/* find position of specified pci capability register*/
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int pci_find_cap(struct pci_device *pdev, const int cap_id)
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@ -105,220 +93,12 @@ bool is_root_port(struct pci_device *pdev)
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return (pcie_type == PCIEM_TYPE_ROOT_PORT);
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}
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/* check whether pdev is a bridge */
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bool is_bridge(struct pci_device *pdev)
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/* check whether pdev is multi-function device */
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bool is_mfdev(struct pci_device *pdev)
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{
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uint8_t hdr_type;
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pci_device_cfg_read_u8(pdev, &hdr_type, PCIR_HDRTYPE);
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return ((hdr_type & PCIM_HDRTYPE) == PCIM_HDRTYPE_BRIDGE);
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return ((hdr_type & PCIM_MFDEV) == PCIM_MFDEV);
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}
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/* add new_child to parent's child list */
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static inline void
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add_child(struct pci_device_info *new_child,
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struct pci_device_info *parent)
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{
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new_child->clist = parent->clist;
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parent->clist = new_child;
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// it is important to reset the new_child's clist to null
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new_child->clist = NULL;
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}
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/* get number of children on bus */
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int get_device_count_on_bus(int bus)
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{
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int count = 0;
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struct pci_device_info *bridge = bus_map[bus];
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struct pci_device_info *next;
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if (bridge == NULL)
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return 0;
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next = bridge->clist;
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while (next != NULL) {
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if (next->is_bridge)
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count += get_device_count_on_bridge(bridge);
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else
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count++;
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next = next->clist;
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}
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return count;
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}
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/* get number of children on bridge */
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int get_device_count_on_bridge(const struct pci_device_info *bridge_info)
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{
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int count = 0;
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int i, ret;
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if (bridge_info == NULL)
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return 0;
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for (i = bridge_info->secondary_bus; i <= bridge_info->subordinate_bus; i++) {
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ret = get_device_count_on_bus(i);
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pr_info("%s: device_count on bus[%x]=%d.\n", __func__, i, ret);
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count += ret;
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}
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return count;
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}
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/* build and cache pci hierarchy in one pci domain
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* @pre: only one pci domain in the system. Need revisit
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* if there is more than one domain in the system.
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*/
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int scan_pci(void)
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{
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int error = 0;
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struct pci_device_iterator *iter;
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struct pci_device *dev;
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int i;
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if (pci_scanned)
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return 0;
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TAILQ_INIT(&pci_device_q);
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pci_scanned = 1;
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iter = pci_slot_match_iterator_create(NULL);
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while ((dev = pci_device_next(iter)) != NULL) {
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struct pci_device_info *pci_info = calloc(1, sizeof(struct pci_device_info));
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if (pci_info == NULL) {
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error = -ENOMEM;
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pr_err("%s, %s: calloc", __func__, __LINE__);
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goto done;
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}
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pci_info->parent = NULL;
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pci_info->clist = NULL;
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pci_info->bdf = PCI_BDF(dev->bus, dev->dev, dev->func);
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TAILQ_INSERT_TAIL(&pci_device_q, pci_info, PCI_DEVICE_Q);
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if (pci_info->bdf == 0) { /* host bridge */
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bus_map[0] = pci_info;
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continue;
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}
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if (is_bridge(dev)) {
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pci_info->is_bridge = true;
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pci_device_get_bridge_buses(dev, &(pci_info->primary_bus),
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&(pci_info->secondary_bus), &(pci_info->subordinate_bus));
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// put bus and bridge into bus_map
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for (i = pci_info->secondary_bus; i <= pci_info->subordinate_bus; i++)
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bus_map[i] = pci_info;
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} else
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pci_info->is_bridge = false;
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// set its parent bridge
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pci_info->parent = bus_map[dev->bus];
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// add itself to its parent bridge's child list
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add_child(pci_info, pci_info->parent);
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}
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done:
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if (error < 0)
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{
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pr_err("%s: failed to build pci hierarchy.\n", __func__);
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clean_pci_cache();
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pci_scanned = false;
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}
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pci_iterator_destroy(iter);
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return error;
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}
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/* find bdf of pci device pdev's root port */
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struct pci_device * pci_find_root_port(const struct pci_device *pdev)
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{
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struct pci_device *bdev;
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int bus, dev, func;
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struct pci_device_info *brdg = bus_map[pdev->bus];
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for (;;) {
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if (brdg == NULL)
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return NULL;
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bus = (brdg->bdf >> 8) & 0xFF;
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dev = (brdg->bdf >> 3) & 0x1F;
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func = brdg->bdf & 0x7;
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bdev = pci_device_find_by_slot(0, bus, dev, func);
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if (is_root_port(bdev))
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return bdev;
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brdg = brdg->parent;
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}
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return NULL;
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}
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/* clean cache of pci device: free all allocated memory */
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void clean_pci_cache(void)
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{
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if (!pci_scanned)
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return;
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while (!TAILQ_EMPTY(&pci_device_q)) {
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struct pci_device_info *p = TAILQ_FIRST(&pci_device_q);
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TAILQ_REMOVE(&pci_device_q, p, PCI_DEVICE_Q);
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}
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pci_scanned = 0;
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}
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#ifdef SCAN_PCI_TEST
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static void
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scan_pci_test(void)
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{
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struct pci_device_info *device_info;
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struct pci_device *pdev;
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int bdf, parent_bdf;
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printf("%s enter.\n", __func__);
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if (!pci_scanned) {
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printf("%s: no pci hierarchy to test.\n", __func__);
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return;
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}
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TAILQ_FOREACH(device_info, &pci_device_q, PCI_DEVICE_Q) {
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bdf = device_info->bdf;
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if (bdf == 0) {
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printf("%s: host bridge.\n", __func__);
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continue;
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}
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parent_bdf = device_info->parent->bdf;
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printf("%s: [%x:%x.%x]: [%x:%x.%x]\n", __func__, (bdf >> 8) & 0xFF, (bdf >> 3) & 0x1F, bdf & 0x7,
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(parent_bdf >> 8) & 0xFF, (parent_bdf >> 3) & 0x1F, parent_bdf & 0x7);
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pdev = pci_device_find_by_slot(0, (bdf >> 8) & 0xFF, (bdf >> 3) & 0x1F, bdf & 0x7);
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if (is_bridge(pdev)) {
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struct pci_device_info *child;
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child = device_info->clist;
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while(child != NULL) {
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printf("\t\t: child: [%x:%x.%x]\n", (child->bdf >> 8) & 0xFF, (child->bdf >> 3) & 0x1F, child->bdf & 0x7);
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child = child->clist;
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}
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}
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}
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}
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#endif
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@ -116,19 +116,12 @@ add_vroot_port(struct vmctx *ctx, struct passthru_dev *ptdev, struct pci_device
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/* Probe whether device and its root port support PTM */
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int ptm_probe(struct vmctx *ctx, struct passthru_dev *ptdev, int *vrp_sec_bus)
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{
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int error = 0;
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int pos, pcie_type, cap, rp_ptm_offset;
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struct pci_device *phys_dev = ptdev->phys_dev;
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struct pci_device *rp;
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struct pci_device_info rp_info = {};
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*vrp_sec_bus = 0;
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/* build pci hierarch */
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error = scan_pci();
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if (error)
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return error;
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if (!ptdev->pcie_cap) {
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pr_err("%s Error: %x:%x.%x is not a pci-e device.\n", __func__,
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phys_dev->bus, phys_dev->dev, phys_dev->func);
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@ -161,8 +154,9 @@ int ptm_probe(struct vmctx *ctx, struct passthru_dev *ptdev, int *vrp_sec_bus)
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return -EINVAL;
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}
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rp = pci_find_root_port(phys_dev);
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if (rp == NULL) {
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/* Do not support switch */
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rp = pci_device_get_parent_bridge(phys_dev);
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if ((rp == NULL) || !is_root_port(rp)) {
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pr_err("%s Error: Cannot find root port of %x:%x.%x.\n", __func__,
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phys_dev->bus, phys_dev->dev, phys_dev->func);
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return -ENODEV;
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@ -177,16 +171,11 @@ int ptm_probe(struct vmctx *ctx, struct passthru_dev *ptdev, int *vrp_sec_bus)
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return -EINVAL;
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}
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/* check whether more than one devices are connected to the root port.
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* if more than one devices are connected to the root port, we flag
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* this as error and won't enable PTM. We do this just because we
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* don't have this hw configuration and won't be able to test this case.
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/* TODO: Support multiple PFs device later as it needs to consider to prevent P2P
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* attack through ACS or passthrough all PFs together.
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*/
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error = pci_device_get_bridge_buses(rp, &(rp_info.primary_bus),
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&(rp_info.secondary_bus), &(rp_info.subordinate_bus));
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if (error || (get_device_count_on_bridge(&rp_info) != 1)) {
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pr_err("%s Error: Failed to enable PTM on root port [%x:%x.%x] that has multiple children.\n",
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if (is_mfdev(phys_dev)) {
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pr_err("%s: Failed to enable PTM on root port [%x:%x.%x], multi-func dev is not supported.\n",
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__func__, rp->bus, rp->dev, rp->func);
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return -EINVAL;
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}
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@ -211,8 +200,7 @@ int ptm_probe(struct vmctx *ctx, struct passthru_dev *ptdev, int *vrp_sec_bus)
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*vrp_sec_bus = add_vroot_port(ctx, ptdev, rp, rp_ptm_offset);
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} else if (pcie_type == PCIEM_TYPE_ROOT_INT_EP) {
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/* Do NOT emulate root port if ptm requestor is RCIE */
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pr_notice("%s: ptm requestor is root complex integrated device.\n",
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__func__);
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pr_notice("%s: ptm requestor is root complex integrated device.\n", __func__);
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} else {
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pr_err("%s Error: PTM can only be enabled on pci root complex integrated device or endpoint device.\n",
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__func__);
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@ -11,32 +11,10 @@
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#include <stdbool.h>
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#include "pciaccess.h"
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struct pci_device_info {
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bool is_bridge;
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int primary_bus;
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int secondary_bus;
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int subordinate_bus;
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uint16_t bdf;
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struct pci_device_info *parent; /* pointer to its parent bridge */
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struct pci_device_info *clist; /* children list */
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/* cache of all pci devices
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* FIXME: remove PCI_DEVICE_Q. To cleanup pci device cache:
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* remove children, then remove parents
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*/
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TAILQ_ENTRY(pci_device_info) PCI_DEVICE_Q;
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};
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int pci_find_cap(struct pci_device *pdev, const int cap_id);
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int pci_find_ext_cap(struct pci_device *pdev, int cap_id);
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int pci_get_pcie_type(struct pci_device *dev);
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bool is_root_port(struct pci_device *pdev);
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bool is_bridge(struct pci_device *pdev);
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int get_device_count_on_bus(int bus);
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int get_device_count_on_bridge(const struct pci_device_info *bridge_info);
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int scan_pci(void);
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struct pci_device * pci_find_root_port(const struct pci_device *pdev);
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void clean_pci_cache(void);
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bool is_mfdev(struct pci_device *pdev);
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#endif
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