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hv: passthrough: Change interrupt pin to uint32_t

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-- Change the type from uint8_t to uint32_t
-- Remove some typecast
-- Change union source_id

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Mingqiang Chi 2019-01-10 10:57:49 +08:00 committed by Xie, Nanlin
parent 87afe65f86
commit 49166fc3ac
4 changed files with 38 additions and 47 deletions
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51
hypervisor/arch/x86/assign.c
View File

@ -42,7 +42,7 @@ ptirq_lookup_entry_by_sid(uint32_t intr_type,
} }
static inline struct ptirq_remapping_info * static inline struct ptirq_remapping_info *
ptirq_lookup_entry_by_vpin(const struct acrn_vm *vm, uint8_t virt_pin, bool pic_pin) ptirq_lookup_entry_by_vpin(const struct acrn_vm *vm, uint32_t virt_pin, bool pic_pin)
{ {
struct ptirq_remapping_info *entry; struct ptirq_remapping_info *entry;
@ -118,18 +118,18 @@ ptirq_build_physical_rte(struct acrn_vm *vm, struct ptirq_remapping_info *entry)
union ioapic_rte virt_rte; union ioapic_rte virt_rte;
bool phys; bool phys;
vioapic_get_rte(vm, (uint32_t)virt_sid->intx_id.pin, &virt_rte); vioapic_get_rte(vm, virt_sid->intx_id.pin, &virt_rte);
rte = virt_rte; rte = virt_rte;
/* init polarity & pin state */ /* init polarity & pin state */
if ((rte.full & IOAPIC_RTE_INTPOL) != 0UL) { if ((rte.full & IOAPIC_RTE_INTPOL) != 0UL) {
if (entry->polarity == 0U) { if (entry->polarity == 0U) {
vioapic_set_irqline_nolock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH); vioapic_set_irqline_nolock(vm, virt_sid->intx_id.pin, GSI_SET_HIGH);
} }
entry->polarity = 1U; entry->polarity = 1U;
} else { } else {
if (entry->polarity == 1U) { if (entry->polarity == 1U) {
vioapic_set_irqline_nolock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_LOW); vioapic_set_irqline_nolock(vm, virt_sid->intx_id.pin, GSI_SET_LOW);
} }
entry->polarity = 0U; entry->polarity = 0U;
} }
@ -167,7 +167,7 @@ ptirq_build_physical_rte(struct acrn_vm *vm, struct ptirq_remapping_info *entry)
/* just update trigger mode */ /* just update trigger mode */
ioapic_get_rte(phys_irq, &phys_rte); ioapic_get_rte(phys_irq, &phys_rte);
rte.full = phys_rte.full & (~IOAPIC_RTE_TRGRMOD); rte.full = phys_rte.full & (~IOAPIC_RTE_TRGRMOD);
vpic_get_irqline_trigger_mode(vm, (uint32_t)virt_sid->intx_id.pin, &trigger); vpic_get_irqline_trigger_mode(vm, virt_sid->intx_id.pin, &trigger);
if (trigger == LEVEL_TRIGGER) { if (trigger == LEVEL_TRIGGER) {
rte.full |= IOAPIC_RTE_TRGRLVL; rte.full |= IOAPIC_RTE_TRGRLVL;
} }
@ -260,11 +260,11 @@ remove_msix_remapping(const struct acrn_vm *vm, uint16_t virt_bdf, uint32_t entr
* - if the entry already be added by vm0, then change the owner to current vm * - if the entry already be added by vm0, then change the owner to current vm
* - if the entry already be added by other vm, return NULL * - if the entry already be added by other vm, return NULL
*/ */
static struct ptirq_remapping_info *add_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, static struct ptirq_remapping_info *add_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin,
uint8_t phys_pin, bool pic_pin) uint32_t phys_pin, bool pic_pin)
{ {
struct ptirq_remapping_info *entry = NULL; struct ptirq_remapping_info *entry = NULL;
uint8_t vpin_src = pic_pin ? PTDEV_VPIN_PIC : PTDEV_VPIN_IOAPIC; uint32_t vpin_src = pic_pin ? PTDEV_VPIN_PIC : PTDEV_VPIN_IOAPIC;
DEFINE_IOAPIC_SID(phys_sid, phys_pin, 0U); DEFINE_IOAPIC_SID(phys_sid, phys_pin, 0U);
DEFINE_IOAPIC_SID(virt_sid, virt_pin, vpin_src); DEFINE_IOAPIC_SID(virt_sid, virt_pin, vpin_src);
uint32_t phys_irq = ioapic_pin_to_irq(phys_pin); uint32_t phys_irq = ioapic_pin_to_irq(phys_pin);
@ -320,7 +320,7 @@ static struct ptirq_remapping_info *add_intx_remapping(struct acrn_vm *vm, uint8
} }
/* deactive & remove mapping entry of vpin for vm */ /* deactive & remove mapping entry of vpin for vm */
static void remove_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, bool pic_pin) static void remove_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin, bool pic_pin)
{ {
uint32_t phys_irq; uint32_t phys_irq;
struct ptirq_remapping_info *entry; struct ptirq_remapping_info *entry;
@ -366,22 +366,22 @@ static void ptirq_handle_intx(struct acrn_vm *vm,
bool trigger_lvl = false; bool trigger_lvl = false;
/* VPIN_IOAPIC src means we have vioapic enabled */ /* VPIN_IOAPIC src means we have vioapic enabled */
vioapic_get_rte(vm, (uint32_t)virt_sid->intx_id.pin, &rte); vioapic_get_rte(vm, virt_sid->intx_id.pin, &rte);
if ((rte.full & IOAPIC_RTE_TRGRMOD) == IOAPIC_RTE_TRGRLVL) { if ((rte.full & IOAPIC_RTE_TRGRMOD) == IOAPIC_RTE_TRGRLVL) {
trigger_lvl = true; trigger_lvl = true;
} }
if (trigger_lvl) { if (trigger_lvl) {
if (entry->polarity != 0U) { if (entry->polarity != 0U) {
vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_LOW); vioapic_set_irqline_lock(vm, virt_sid->intx_id.pin, GSI_SET_LOW);
} else { } else {
vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH); vioapic_set_irqline_lock(vm, virt_sid->intx_id.pin, GSI_SET_HIGH);
} }
} else { } else {
if (entry->polarity != 0U) { if (entry->polarity != 0U) {
vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_FALLING_PULSE); vioapic_set_irqline_lock(vm, virt_sid->intx_id.pin, GSI_FALLING_PULSE);
} else { } else {
vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_RAISING_PULSE); vioapic_set_irqline_lock(vm, virt_sid->intx_id.pin, GSI_RAISING_PULSE);
} }
} }
@ -397,11 +397,11 @@ static void ptirq_handle_intx(struct acrn_vm *vm,
enum vpic_trigger trigger; enum vpic_trigger trigger;
/* VPIN_PIC src means we have vpic enabled */ /* VPIN_PIC src means we have vpic enabled */
vpic_get_irqline_trigger_mode(vm, (uint32_t)virt_sid->intx_id.pin, &trigger); vpic_get_irqline_trigger_mode(vm, virt_sid->intx_id.pin, &trigger);
if (trigger == LEVEL_TRIGGER) { if (trigger == LEVEL_TRIGGER) {
vpic_set_irqline(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH); vpic_set_irqline(vm, virt_sid->intx_id.pin, GSI_SET_HIGH);
} else { } else {
vpic_set_irqline(vm, (uint32_t)virt_sid->intx_id.pin, GSI_RAISING_PULSE); vpic_set_irqline(vm, virt_sid->intx_id.pin, GSI_RAISING_PULSE);
} }
break; break;
} }
@ -455,8 +455,7 @@ void ptirq_softirq(uint16_t pcpu_id)
} }
} }
void ptirq_intx_ack(struct acrn_vm *vm, uint8_t virt_pin, void ptirq_intx_ack(struct acrn_vm *vm, uint32_t virt_pin, uint32_t vpin_src)
uint8_t vpin_src)
{ {
uint32_t phys_irq; uint32_t phys_irq;
struct ptirq_remapping_info *entry; struct ptirq_remapping_info *entry;
@ -585,7 +584,7 @@ static void activate_physical_ioapic(struct acrn_vm *vm,
/* Main entry for PCI/Legacy device assignment with INTx, calling from vIOAPIC /* Main entry for PCI/Legacy device assignment with INTx, calling from vIOAPIC
* or vPIC * or vPIC
*/ */
int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint8_t virt_pin, uint8_t vpin_src) int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint32_t virt_pin, uint32_t vpin_src)
{ {
int32_t status = 0; int32_t status = 0;
struct ptirq_remapping_info *entry = NULL; struct ptirq_remapping_info *entry = NULL;
@ -626,7 +625,7 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint8_t virt_pin, uint8_t vpin_
* switch vpin source is needed * switch vpin source is needed
*/ */
if (virt_pin < NR_LEGACY_PIN) { if (virt_pin < NR_LEGACY_PIN) {
uint8_t vpin = get_pic_pin_from_ioapic_pin(virt_pin); uint32_t vpin = get_pic_pin_from_ioapic_pin(virt_pin);
entry = ptirq_lookup_entry_by_vpin(vm, vpin, !pic_pin); entry = ptirq_lookup_entry_by_vpin(vm, vpin, !pic_pin);
if (entry != NULL) { if (entry != NULL) {
@ -636,14 +635,13 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint8_t virt_pin, uint8_t vpin_
/* entry could be updated by above switch check */ /* entry could be updated by above switch check */
if (entry == NULL) { if (entry == NULL) {
uint8_t phys_pin = virt_pin; uint32_t phys_pin = virt_pin;
/* fix vPIC pin to correct native IOAPIC pin */ /* fix vPIC pin to correct native IOAPIC pin */
if (pic_pin) { if (pic_pin) {
phys_pin = get_pic_pin_from_ioapic_pin(virt_pin); phys_pin = get_pic_pin_from_ioapic_pin(virt_pin);
} }
entry = add_intx_remapping(vm, entry = add_intx_remapping(vm, virt_pin, phys_pin, pic_pin);
virt_pin, phys_pin, pic_pin);
if (entry == NULL) { if (entry == NULL) {
pr_err("%s, add intx remapping failed", pr_err("%s, add intx remapping failed",
__func__); __func__);
@ -689,8 +687,7 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint8_t virt_pin, uint8_t vpin_
* - currently, one phys_pin can only be held by one pin source (vPIC or * - currently, one phys_pin can only be held by one pin source (vPIC or
* vIOAPIC) * vIOAPIC)
*/ */
int32_t ptirq_add_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, uint8_t phys_pin, int32_t ptirq_add_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin, uint32_t phys_pin, bool pic_pin)
bool pic_pin)
{ {
struct ptirq_remapping_info *entry; struct ptirq_remapping_info *entry;
@ -704,7 +701,7 @@ int32_t ptirq_add_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, uint8_t p
/* /*
* @pre vm != NULL * @pre vm != NULL
*/ */
void ptirq_remove_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, bool pic_pin) void ptirq_remove_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin, bool pic_pin)
{ {
spinlock_obtain(&ptdev_lock); spinlock_obtain(&ptdev_lock);
remove_intx_remapping(vm, virt_pin, pic_pin); remove_intx_remapping(vm, virt_pin, pic_pin);

8
hypervisor/include/arch/x86/assign.h
View File

@ -36,7 +36,7 @@
* @pre vm != NULL * @pre vm != NULL
* *
*/ */
void ptirq_intx_ack(struct acrn_vm *vm, uint8_t virt_pin, uint8_t vpin_src); void ptirq_intx_ack(struct acrn_vm *vm, uint32_t virt_pin, uint32_t vpin_src);
/** /**
* @brief MSI/MSI-x remapping for passthrough device. * @brief MSI/MSI-x remapping for passthrough device.
@ -81,7 +81,7 @@ int32_t ptirq_msix_remap(struct acrn_vm *vm, uint16_t virt_bdf, uint16_t entry_n
* @pre vm != NULL * @pre vm != NULL
* *
*/ */
int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint8_t virt_pin, uint8_t vpin_src); int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint32_t virt_pin, uint32_t vpin_src);
/** /**
* @brief Add an interrupt remapping entry for INTx as pre-hold mapping. * @brief Add an interrupt remapping entry for INTx as pre-hold mapping.
@ -103,7 +103,7 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint8_t virt_pin, uint8_t vpin_
* @pre vm != NULL * @pre vm != NULL
* *
*/ */
int32_t ptirq_add_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, uint8_t phys_pin, bool pic_pin); int32_t ptirq_add_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin, uint32_t phys_pin, bool pic_pin);
/** /**
* @brief Remove an interrupt remapping entry for INTx. * @brief Remove an interrupt remapping entry for INTx.
@ -119,7 +119,7 @@ int32_t ptirq_add_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, uint8_t p
* @pre vm != NULL * @pre vm != NULL
* *
*/ */
void ptirq_remove_intx_remapping(struct acrn_vm *vm, uint8_t virt_pin, bool pic_pin); void ptirq_remove_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin, bool pic_pin);
/** /**
* @brief Add interrupt remapping entry/entries for MSI/MSI-x as pre-hold mapping. * @brief Add interrupt remapping entry/entries for MSI/MSI-x as pre-hold mapping.

8
hypervisor/include/common/ptdev.h
View File

@ -24,15 +24,15 @@ union source_id (name) = {.msi_id = {.bdf = (a), .entry_nr = (b)} }
union source_id (name) = {.intx_id = {.pin = (a), .src = (b)} } union source_id (name) = {.intx_id = {.pin = (a), .src = (b)} }
union source_id { union source_id {
uint32_t value; uint64_t value;
struct { struct {
uint16_t bdf; uint16_t bdf;
uint16_t entry_nr; uint16_t entry_nr;
uint32_t reserved;
} msi_id; } msi_id;
struct { struct {
uint8_t pin; uint32_t pin;
uint8_t src; uint32_t src;
uint16_t reserved;
} intx_id; } intx_id;
}; };

18
hypervisor/include/public/acrn_hv_defs.h
View File

@ -246,30 +246,24 @@ struct hc_ptdev_irq {
/** physical BDF of the ptdev */ /** physical BDF of the ptdev */
uint16_t phys_bdf; uint16_t phys_bdf;
union { union irq_source {
/** INTX remapping info */ /** INTX remapping info */
struct { struct intx_info {
/** virtual IOAPIC/PIC pin */ /** virtual IOAPIC/PIC pin */
uint8_t virt_pin; uint32_t virt_pin;
/** Reserved */
uint32_t reserved0:24;
/** physical IOAPIC pin */ /** physical IOAPIC pin */
uint8_t phys_pin; uint32_t phys_pin;
/** Reserved */
uint32_t reserved1:24;
/** is virtual pin from PIC */ /** is virtual pin from PIC */
bool pic_pin; bool pic_pin;
/** Reserved */ /** Reserved */
uint32_t reserved2:24; uint8_t reserved[3];
} intx; } intx;
/** MSIx remapping info */ /** MSIx remapping info */
struct { struct msix_info {
/** vector count of MSI/MSIX */ /** vector count of MSI/MSIX */
uint32_t vector_cnt; uint32_t vector_cnt;
} msix; } msix;