HV: rename the term of vm0 to sos vm

Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

hypervisor/include/arch/x86/assign.h

@@ -86,7 +86,7 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint32_t virt_pin, uint32_t vpi
 /**
  * @brief Add an interrupt remapping entry for INTx as pre-hold mapping.
  *
- * Except vm0, Device Model should call this function to pre-hold ptdev intx
+ * Except sos_vm, Device Model should call this function to pre-hold ptdev intx
  * The entry is identified by phys_pin, one entry vs. one phys_pin.
  * Currently, one phys_pin can only be held by one pin source (vPIC or vIOAPIC).
  *
@@ -125,7 +125,7 @@ void ptirq_remove_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin, bool pic
  * @brief Add interrupt remapping entry/entries for MSI/MSI-x as pre-hold mapping.
  *
  * Add pre-hold mapping of the given number of vectors between the given physical and virtual BDF for the given vm.
- * Except vm0, Device Model should call this function to pre-hold ptdev MSI/MSI-x.
+ * Except sos_vm, Device Model should call this function to pre-hold ptdev MSI/MSI-x.
  * The entry is identified by phys_bdf:msi_idx, one entry vs. one phys_bdf:msi_idx.
  *
  * @param[in] vm pointer to acrn_vm

hypervisor/include/arch/x86/e820.h

@@ -18,10 +18,10 @@ struct e820_mem_params {
 /* HV read multiboot header to get e820 entries info and calc total RAM info */
 void init_e820(void);
 
-/* before boot vm0(service OS), call it to hide the HV RAM entry in e820 table from vm0 */
-void rebuild_vm0_e820(void);
+/* before boot sos_vm(service OS), call it to hide the HV RAM entry in e820 table from sos_vm */
+void rebuild_sos_vm_e820(void);
 
-/* get some RAM below 1MB in e820 entries, hide it from vm0, return its start address */
+/* get some RAM below 1MB in e820 entries, hide it from sos_vm, return its start address */
 uint64_t e820_alloc_low_memory(uint32_t size_arg);
 
 /* copy the original e820 entries info to param_e820 */

hypervisor/include/arch/x86/guest/guest.h

@@ -70,7 +70,7 @@
 #define LDTR_AR                         (0x0082U) /* LDT, type must be 2, refer to SDM Vol3 26.3.1.2 */
 #define TR_AR                           (0x008bU) /* TSS (busy), refer to SDM Vol3 26.3.1.2 */
 
-void prepare_vm0_memmap(struct acrn_vm *vm);
+void prepare_sos_vm_memmap(struct acrn_vm *vm);
 
 /* Use # of paging level to identify paging mode */
 enum vm_paging_mode {

hypervisor/include/arch/x86/guest/vm.h

@@ -235,7 +235,7 @@ struct acrn_vm_config {
 
 } __aligned(8);
 
-static inline bool is_vm0(const struct acrn_vm *vm)
+static inline bool is_sos_vm(const struct acrn_vm *vm)
 {
 	return (vm->vm_id) == 0U;
 }

hypervisor/include/arch/x86/mmu.h

@@ -238,13 +238,13 @@ uint64_t gpa2hpa(struct acrn_vm *vm, uint64_t gpa);
  */
 uint64_t local_gpa2hpa(struct acrn_vm *vm, uint64_t gpa, uint32_t *size);
 /**
- * @brief Translating from host-physical address to guest-physical address for VM0
+ * @brief Translating from host-physical address to guest-physical address for SOS_VM
  *
  * @param[in] hpa the specified host-physical address
  *
  * @pre: the gpa and hpa are identical mapping in SOS.
  */
-uint64_t vm0_hpa2gpa(uint64_t hpa);
+uint64_t sos_vm_hpa2gpa(uint64_t hpa);
 /**
  * @brief Guest-physical memory region mapping
  *

hypervisor/include/arch/x86/vtd.h

@@ -485,7 +485,7 @@ struct iommu_domain;
 /**
  * @brief Assign a device specified by bus & devfun to a iommu domain.
  *
- * Remove the device from the VM0 domain (if present), and add it to the specific domain.
+ * Remove the device from the SOS_VM domain (if present), and add it to the specific domain.
  *
  * @param[in]    domain iommu domain the device is assigned to
  * @param[in]    bus the 8-bit bus number of the device
@@ -502,7 +502,7 @@ int32_t assign_iommu_device(struct iommu_domain *domain, uint8_t bus, uint8_t de
 /**
  * @brief Unassign a device specified by bus & devfun from a iommu domain .
  *
- * Remove the device from the specific domain, and then add it to the VM0 domain (if present).
+ * Remove the device from the specific domain, and then add it to the SOS_VM domain (if present).
  *
  * @param[in]    domain iommu domain the device is assigned to
  * @param[in]    bus the 8-bit bus number of the device
@@ -594,19 +594,19 @@ void resume_iommu(void);
 int32_t init_iommu(void);
 
 /**
- * @brief Init VM0 domain of iommu.
+ * @brief Init SOS_VM domain of iommu.
  *
- * Create VM0 domain using the Normal World's EPT table of VM0 as address translation table.
- * All PCI devices are added to the VM0 domain when creating it.
+ * Create SOS_VM domain using the Normal World's EPT table of SOS_VM as address translation table.
+ * All PCI devices are added to the SOS_VM domain when creating it.
  *
- * @param[in] vm0 pointer to VM0
+ * @param[in] sos_vm pointer to SOS_VM
  *
- * @pre vm0 shall point to VM0
+ * @pre sos_vm shall point to SOS_VM
  *
  * @remark to reduce boot time & memory cost, a config IOMMU_INIT_BUS_LIMIT, which limit the bus number.
  *
  */
-void init_iommu_vm0_domain(struct acrn_vm *vm0);
+void init_iommu_sos_vm_domain(struct acrn_vm *sos_vm);
 
 /**
  * @brief check the iommu if support cache snoop.