From 4a22801dd1b7dfe4899511fa6b67935df06e2eaf Mon Sep 17 00:00:00 2001 From: Binbin Wu Date: Mon, 1 Jul 2019 09:54:11 +0800 Subject: [PATCH] hv: ept: mask EPT leaf entry bit 52 to bit 63 in gpa2hpa According to SDM, bit N (physical address width) to bit 63 should be masked when calculate host page frame number. Currently, hypervisor doesn't set any of these bits, so gpa2hpa can work as expectd. However, any of these bit set, gpa2hpa return wrong value. Hypervisor never sets bit N to bit 51 (reserved bits), for simplicity, just mask bit 52 to bit 63. Tracked-On: #3352 Signed-off-by: Binbin Wu Reviewed-by: Eddie Dong --- hypervisor/arch/x86/guest/ept.c | 2 +- hypervisor/include/arch/x86/pgtable.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/hypervisor/arch/x86/guest/ept.c b/hypervisor/arch/x86/guest/ept.c index 0000cc07d..8b5eeeea8 100644 --- a/hypervisor/arch/x86/guest/ept.c +++ b/hypervisor/arch/x86/guest/ept.c @@ -44,7 +44,7 @@ uint64_t local_gpa2hpa(struct acrn_vm *vm, uint64_t gpa, uint32_t *size) eptp = get_ept_entry(vm); pgentry = lookup_address((uint64_t *)eptp, gpa, &pg_size, &vm->arch_vm.ept_mem_ops); if (pgentry != NULL) { - hpa = ((*pgentry & (~(pg_size - 1UL))) + hpa = (((*pgentry & (~EPT_PFN_HIGH_MASK)) & (~(pg_size - 1UL))) | (gpa & (pg_size - 1UL))); } diff --git a/hypervisor/include/arch/x86/pgtable.h b/hypervisor/include/arch/x86/pgtable.h index 41e539b89..0c6493b23 100644 --- a/hypervisor/include/arch/x86/pgtable.h +++ b/hypervisor/include/arch/x86/pgtable.h @@ -111,6 +111,8 @@ /* VTD: Second-Level Paging Entries: Snoop Control */ #define EPT_SNOOP_CTRL (1UL << 11U) #define EPT_VE (1UL << 63U) +/* EPT leaf entry bits (bit 52 - bit 63) should be maksed when calculate PFN */ +#define EPT_PFN_HIGH_MASK 0xFFF0000000000000UL #define PML4E_SHIFT 39U #define PTRS_PER_PML4E 512UL