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HV: Fix missing brackets for MISRA C Violations

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Patch 5 of 7
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
This commit is contained in:
Arindam Roy
2018-07-12 15:02:33 -07:00
committed by wenlingz
parent d16d9e5751
commit 4aa6cdacf7
8 changed files with 249 additions and 130 deletions
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12
hypervisor/arch/x86/softirq.c
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@@ -47,22 +47,25 @@ void exec_softirq(void)
if (cpu_id >= phys_cpu_num)
return;
if (((*bitmap) & SOFTIRQ_MASK) == 0UL)
if (((*bitmap) & SOFTIRQ_MASK) == 0UL) {
return;
}
/* Disable softirq
* SOFTIRQ_ATOMIC bit = 0 means softirq already in execution
*/
if (!bitmap_test_and_clear(SOFTIRQ_ATOMIC, bitmap))
if (!bitmap_test_and_clear(SOFTIRQ_ATOMIC, bitmap)) {
return;
}
again:
CPU_IRQ_ENABLE();
while (1) {
softirq_id = ffs64(*bitmap);
if ((softirq_id == INVALID_BIT_INDEX) || (softirq_id >= SOFTIRQ_MAX))
if ((softirq_id == INVALID_BIT_INDEX) || (softirq_id >= SOFTIRQ_MAX)) {
break;
}
bitmap_clear(softirq_id, bitmap);
@@ -81,8 +84,9 @@ again:
CPU_IRQ_DISABLE();
if (((*bitmap) & SOFTIRQ_MASK) != 0U)
if (((*bitmap) & SOFTIRQ_MASK) != 0U) {
goto again;
}
enable_softirq(cpu_id);
}