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dm: cleanup legacy terminologies in RTCM module

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Update below terminologies according to latest TCC Spec:
  PTCM -> RTCM
  PTCT -> RTCT
  PTCM binary -> CRL
  pSRAM -> Software SRAM

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
This commit is contained in:
Yonghua Huang 2021-01-26 13:31:35 +08:00 committed by wenlingz
parent baea9ecb44
commit 4ac1205b29
5 changed files with 58 additions and 56 deletions
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10
devicemodel/core/main.c
View File

@ -166,7 +166,7 @@ usage(int code)
" -Y: disable MPtable generation\n"
" --mac_seed: set a platform unique string as a seed for generate mac address\n"
" --vsbl: vsbl file path\n"
" --psram: Enable pSRAM passthrough\n"
" --psram: Enable Software SRAM passthrough\n"
" --ovmf: ovmf file path\n"
" --cpu_affinity: list of pCPUs assigned to this VM\n"
" --part_info: guest partition info file path\n"
@ -747,7 +747,7 @@ enum {
CMD_OPT_VTPM2,
CMD_OPT_LAPIC_PT,
CMD_OPT_RTVM,
CMD_OPT_PSRAM,
CMD_OPT_SOFTWARE_SRAM,
CMD_OPT_LOGGER_SETTING,
CMD_OPT_PM_NOTIFY_CHANNEL,
CMD_OPT_PM_BY_VUART,
@ -789,7 +789,7 @@ static struct option long_options[] = {
{"vtpm2", required_argument, 0, CMD_OPT_VTPM2},
{"lapic_pt", no_argument, 0, CMD_OPT_LAPIC_PT},
{"rtvm", no_argument, 0, CMD_OPT_RTVM},
{"psram", no_argument, 0, CMD_OPT_PSRAM},
{"psram", no_argument, 0, CMD_OPT_SOFTWARE_SRAM},
{"logger_setting", required_argument, 0, CMD_OPT_LOGGER_SETTING},
{"pm_notify_channel", required_argument, 0, CMD_OPT_PM_NOTIFY_CHANNEL},
{"pm_by_vuart", required_argument, 0, CMD_OPT_PM_BY_VUART},
@ -933,8 +933,8 @@ main(int argc, char *argv[])
case CMD_OPT_RTVM:
is_rtvm = true;
break;
case CMD_OPT_PSRAM:
/* TODO: we need to support parameter to specify pSRAM size in the future */
case CMD_OPT_SOFTWARE_SRAM:
/* TODO: we need to support parameter to specify Software SRAM size in the future */
pt_ptct = true;
break;
case CMD_OPT_ACPIDEV_PT:

12
devicemodel/core/sw_load_common.c
View File

@ -34,7 +34,7 @@
#include "sw_load.h"
#include "dm.h"
#include "pci_core.h"
#include "ptct.h"
#include "rtct.h"
int with_bootargs;
static char bootargs[BOOT_ARG_LEN];
@ -55,7 +55,7 @@ static char bootargs[BOOT_ARG_LEN];
* 0: 0 - 0xA0000 RAM 0xA0000
* 1: 0x100000 - lowmem part1 RAM 0x0
* 2: gpu_rsvd_bot - gpu_rsvd_top (reserved) 0x4004000
* 3: pSRAM_bottom - pSRAM_top (reserved) pSRAM_MAX_SIZE
* 3: SW SRAM_bot - SW SRAM_top (reserved) SOFTWARE_SRAM_MAX_SIZE
* 4: lowmem part2 - 0x80000000 (reserved) 0x0
* 5: 0xDB000000 - 0xDF000000 (reserved) 64MB
* 6: 0xDF000000 - 0xE0000000 (reserved) 16MB
@ -83,14 +83,14 @@ const struct e820_entry e820_default_entries[NUM_E820_ENTRIES] = {
.type = E820_TYPE_RESERVED
},
{ /* pSRAM area */
.baseaddr = PSRAM_BASE_GPA,
.length = PSRAM_MAX_SIZE,
{ /* Software SRAM area */
.baseaddr = SOFTWARE_SRAM_BASE_GPA,
.length = SOFTWARE_SRAM_MAX_SIZE,
.type = E820_TYPE_RESERVED
},
{ /* lowmem part2 to lowmem_limit */
.baseaddr = PSRAM_BASE_GPA + PSRAM_MAX_SIZE,
.baseaddr = SOFTWARE_SRAM_BASE_GPA + SOFTWARE_SRAM_MAX_SIZE,
.length = 0x0,
.type = E820_TYPE_RESERVED
},

60
devicemodel/hw/platform/acpi/acpi.c
View File

@ -71,7 +71,7 @@
#include "vmmapi.h"
#include "hpet.h"
#include "log.h"
#include "ptct.h"
#include "rtct.h"
#include "vhm_ioctl_defs.h"
#include "vmmapi.h"
@ -90,7 +90,7 @@
#define FACS_OFFSET 0x3C0
#define NHLT_OFFSET 0x400
#define TPM2_OFFSET 0xC00
#define PTCT_OFFSET 0xF00
#define RTCT_OFFSET 0xF00
#define DSDT_OFFSET 0x1100
#define ASL_TEMPLATE "dm.XXXXXXX"
@ -194,7 +194,7 @@ basl_fwrite_rsdt(FILE *fp, struct vmctx *ctx)
if (pt_ptct) {
EFPRINTF(fp, "[0004]\t\tACPI Table Address %u : %08X\n", num++,
basl_acpi_base + PTCT_OFFSET);
basl_acpi_base + RTCT_OFFSET);
}
EFFLUSH(fp);
@ -241,7 +241,7 @@ basl_fwrite_xsdt(FILE *fp, struct vmctx *ctx)
if (pt_ptct) {
EFPRINTF(fp, "[0004]\t\tACPI Table Address %u : 00000000%08X\n", num++,
basl_acpi_base + PTCT_OFFSET);
basl_acpi_base + RTCT_OFFSET);
}
EFFLUSH(fp);
@ -1081,48 +1081,50 @@ static struct {
};
/*
* So far, only support passthrough native pSRAM to single post-launched VM.
* So far, only support passthrough native Software SRAM to single post-launched VM.
*/
int create_and_inject_vptct(struct vmctx *ctx)
int create_and_inject_vrtct(struct vmctx *ctx)
{
#define PTCT_NATIVE_FILE_PATH_IN_SOS "/sys/firmware/acpi/tables/PTCT"
#define PTCT_BUF_LEN 0x200 /* Otherwise, need to modify DSDT_OFFSET corresponding */
int native_ptct_fd;
#define RTCT_NATIVE_FILE_PATH_IN_SOS "/sys/firmware/acpi/tables/PTCT"
#define RTCT_BUF_LEN 0x200 /* Otherwise, need to modify DSDT_OFFSET corresponding */
int native_rtct_fd;
int rc;
size_t native_ptct_len;
size_t vptct_len;
uint8_t buf[PTCT_BUF_LEN] = {0};
size_t native_rtct_len;
size_t vrtct_len;
uint8_t buf[RTCT_BUF_LEN] = {0};
struct vm_memmap memmap = {
.type = VM_MMIO,
.gpa = PSRAM_BASE_GPA,
.hpa = PSRAM_BASE_HPA,
/* TODO: .len should be psram_size+32kb (32kb is for PTCM binary). We also need to modify guest E820 to adapt to real config */
.len = PSRAM_MAX_SIZE,
.gpa = SOFTWARE_SRAM_BASE_GPA,
.hpa = SOFTWARE_SRAM_BASE_HPA,
/* TODO: .len should be software ram_size+32kb (32kb is for CRL binary).
*We also need to modify guest E820 to adapt to real config
*/
.len = SOFTWARE_SRAM_MAX_SIZE,
.prot = PROT_ALL
};
native_ptct_fd = open(PTCT_NATIVE_FILE_PATH_IN_SOS, O_RDONLY);
if (native_ptct_fd < 0){
native_rtct_fd = open(RTCT_NATIVE_FILE_PATH_IN_SOS, O_RDONLY);
if (native_rtct_fd < 0) {
pr_err("failed to open /sys/firmware/acpi/tables/PTCT !!!!! errno:%d\n", errno);
return -1;
}
native_ptct_len = lseek(native_ptct_fd, 0, SEEK_END);
if (native_ptct_len > PTCT_BUF_LEN) {
pr_err("%s native_ptct_len = %d large than PTCT_BUF_LEN\n", __func__, native_ptct_len);
native_rtct_len = lseek(native_rtct_fd, 0, SEEK_END);
if (native_rtct_len > RTCT_BUF_LEN) {
pr_err("%s native_rtct_len = %d large than RTCT_BUF_LEN\n", __func__, native_rtct_len);
return -1;
}
(void)lseek(native_ptct_fd, 0, SEEK_SET);
rc = read(native_ptct_fd, buf, native_ptct_len);
if (rc < native_ptct_len ){
pr_err("Native PTCT is not fully read into buf!!!");
(void)lseek(native_rtct_fd, 0, SEEK_SET);
rc = read(native_rtct_fd, buf, native_rtct_len);
if (rc < native_rtct_len) {
pr_err("Native RTCT is not fully read into buf!!!");
return -1;
}
close(native_ptct_fd);
close(native_rtct_fd);
vptct_len = native_ptct_len;
vrtct_len = native_rtct_len;
memcpy(vm_map_gpa(ctx, ACPI_BASE + PTCT_OFFSET, vptct_len), buf, vptct_len);
memcpy(vm_map_gpa(ctx, ACPI_BASE + RTCT_OFFSET, vrtct_len), buf, vrtct_len);
ioctl(ctx->fd, IC_UNSET_MEMSEG, &memmap);
return ioctl(ctx->fd, IC_SET_MEMSEG, &memmap);
@ -1199,7 +1201,7 @@ acpi_build(struct vmctx *ctx, int ncpu)
}
if (pt_ptct) {
create_and_inject_vptct(ctx);
create_and_inject_vrtct(ctx);
}
return err;

16
devicemodel/include/ptct.h
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@ -1,16 +0,0 @@
/*
* Copyright (C) 2020 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PTCT_H
#define PTCT_H
/* TODO: Move to high-memory region. */
#define PSRAM_BASE_HPA 0x40080000UL
#define PSRAM_BASE_GPA 0x40080000UL
#define PSRAM_MAX_SIZE 0x00800000UL
#endif /* PTCT_H */

16
devicemodel/include/rtct.h Normal file
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@ -0,0 +1,16 @@
/*
* Copyright (C) 2020 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef RTCT_H
#define RTCT_H
/* TODO: Move to high-memory region. */
#define SOFTWARE_SRAM_BASE_HPA 0x40080000UL
#define SOFTWARE_SRAM_BASE_GPA 0x40080000UL
#define SOFTWARE_SRAM_MAX_SIZE 0x00800000UL
#endif /* RTCT_H */