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hv:treewide:fix multiple MISRAC violations

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MISRAC has requirements about literal value requires a U suffix and
signed/unsigned conversion with cast. This patch is used to solve
these violations.

v1->v2
 *Drop the cast of sz from uint32_t to int32_t, the signed/unsigned
  violation of nchars will be solved by other patch together with
  printf/sprintf/console/vuart/uart code.

 *Delete the unnecessary L suffix of shifting operand.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Reviewed by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Junjun Shan
2018-09-11 10:56:05 +08:00
committed by lijinxia
parent 00edd838c9
commit 4fd5102edc
15 changed files with 50 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
hypervisor/arch/x86/guest/instr_emul.c
View File

@@ -639,15 +639,15 @@ build_getcc(getcc64, uint64_t, x, y)
static uint64_t getcc(uint8_t opsize, uint64_t x, uint64_t y)
{
switch (opsize) {
case 1:
return getcc8((uint8_t) x, (uint8_t) y);
case 2:
return getcc16((uint16_t) x, (uint16_t) y);
case 4:
return getcc32((uint32_t) x, (uint32_t) y);
default: /* opsize == 8 */
return getcc64(x, y);
}
case 1U:
return getcc8((uint8_t) x, (uint8_t) y);
case 2U:
return getcc16((uint16_t) x, (uint16_t) y);
case 4U:
return getcc32((uint32_t) x, (uint32_t) y);
default: /* opsize == 8 */
return getcc64(x, y);
}
}
static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie)
@@ -740,7 +740,7 @@ static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie)
* REX + C6/0 mov r/m8, imm8
*/
size = 1U; /* override for byte operation */
error = mmio_write(vcpu, vie->immediate);
error = mmio_write(vcpu, (uint64_t)vie->immediate);
break;
case 0xC7U:
/*

4
hypervisor/arch/x86/mmu.c
View File

@@ -265,7 +265,7 @@ void *alloc_paging_struct(void)
ptr = alloc_page();
ASSERT(ptr != NULL, "page alloc failed!");
(void)memset(ptr, 0, CPU_PAGE_SIZE);
(void)memset(ptr, 0U, CPU_PAGE_SIZE);
return ptr;
}
@@ -273,7 +273,7 @@ void *alloc_paging_struct(void)
void free_paging_struct(void *ptr)
{
if (ptr != NULL) {
(void)memset(ptr, 0, CPU_PAGE_SIZE);
(void)memset(ptr, 0U, CPU_PAGE_SIZE);
free(ptr);
}
}

4
hypervisor/arch/x86/timer.c
View File

@@ -261,7 +261,7 @@ static uint64_t pit_calibrate_tsc(uint32_t cal_ms_arg)
*/
static uint64_t native_calibrate_tsc(void)
{
uint64_t tsc_hz = 0;
uint64_t tsc_hz = 0UL;
if (boot_cpu_data.cpuid_level >= 0x15U) {
uint32_t eax_denominator, ebx_numerator, ecx_hz, reserved;
@@ -275,7 +275,7 @@ static uint64_t native_calibrate_tsc(void)
}
}
if ((tsc_hz == 0) && (boot_cpu_data.cpuid_level >= 0x16U)) {
if ((tsc_hz == 0UL) && (boot_cpu_data.cpuid_level >= 0x16U)) {
uint32_t eax_base_mhz, ebx_max_mhz, ecx_bus_mhz, edx;
cpuid(0x16U, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
tsc_hz = (uint64_t) eax_base_mhz * 1000000U;

2
hypervisor/arch/x86/trusty.c
View File

@@ -65,7 +65,7 @@ static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
uint64_t gpa = 0UL;
uint64_t hpa = gpa2hpa(vm, gpa_orig);
uint64_t table_present = EPT_RWX;
uint64_t pdpte = 0, *dest_pdpte_p = NULL, *src_pdpte_p = NULL;
uint64_t pdpte = 0UL, *dest_pdpte_p = NULL, *src_pdpte_p = NULL;
void *sub_table_addr = NULL, *pml4_base = NULL;
struct vm *vm0 = get_vm_from_vmid(0U);
uint16_t i;

6
hypervisor/arch/x86/vmx.c
View File

@@ -681,14 +681,14 @@ static void init_guest_state(struct vcpu *vcpu)
if (vcpu_mode == CPU_MODE_REAL) {
init_guest_context_real(vcpu);
init_guest_vmx(vcpu, CR0_ET | CR0_NE, 0, 0);
init_guest_vmx(vcpu, CR0_ET | CR0_NE, 0UL, 0UL);
} else if (is_vm0(vcpu->vm) && is_vcpu_bsp(vcpu)) {
init_guest_context_vm0_bsp(vcpu);
init_guest_vmx(vcpu, init_ctx->cr0, init_ctx->cr3,
init_ctx->cr4 & ~CR4_VMXE);
} else {
init_guest_context_protect(vcpu);
init_guest_vmx(vcpu, CR0_ET | CR0_NE | CR0_PE, 0, 0);
init_guest_vmx(vcpu, CR0_ET | CR0_NE | CR0_PE, 0UL, 0UL);
}
}
@@ -984,7 +984,7 @@ static void init_exec_ctrl(struct vcpu *vcpu)
exec_vmwrite64(VMX_EOI_EXIT2_FULL, 0UL);
exec_vmwrite64(VMX_EOI_EXIT3_FULL, 0UL);
exec_vmwrite16(VMX_GUEST_INTR_STATUS, 0);
exec_vmwrite16(VMX_GUEST_INTR_STATUS, 0U);
}
/* Load EPTP execution control