From 5130dfe08bba6ae6ac40b6f421a2565fb3e61fc7 Mon Sep 17 00:00:00 2001 From: Fei Li Date: Fri, 22 Apr 2022 18:40:34 +0800 Subject: [PATCH] hv: vSRIOV: add VF BARs mapping for PF When enabling SRIOV capability for a PF in Service VM, ACRN Hypervisor should add VF BARs mapping for PF since PF's firmware would access these BARs to do initialization for VFs when it's first created. Tracked-On: #4433 Signed-off-by: Fei Li --- hypervisor/dm/vpci/pci_pt.c | 2 +- hypervisor/dm/vpci/vsriov.c | 15 +++++++++++---- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/hypervisor/dm/vpci/pci_pt.c b/hypervisor/dm/vpci/pci_pt.c index 4a9568bbc..ec2372b0a 100644 --- a/hypervisor/dm/vpci/pci_pt.c +++ b/hypervisor/dm/vpci/pci_pt.c @@ -582,7 +582,7 @@ void init_vdev_pt(struct pci_vdev *vdev, bool is_pf_vdev) pci_vdev_write_vcfg(vdev, PCIR_VENDOR, 2U, vid); pci_vdev_write_vcfg(vdev, PCIR_DEVICE, 2U, did); } else { - /* VF is unassinged */ + /* VF is unassinged: when VF was first created, the VF's BARs hasn't been assigned */ uint32_t bar_idx; for (bar_idx = 0U; bar_idx < vdev->nr_bars; bar_idx++) { diff --git a/hypervisor/dm/vpci/vsriov.c b/hypervisor/dm/vpci/vsriov.c index 9e93f6d9d..9c9d8bdae 100644 --- a/hypervisor/dm/vpci/vsriov.c +++ b/hypervisor/dm/vpci/vsriov.c @@ -27,6 +27,7 @@ */ #include +#include #include #include #include @@ -123,20 +124,26 @@ static void create_vf(struct pci_vdev *pf_vdev, union pci_bdf vf_bdf, uint16_t v *vf_vbar = vf_vdev->phyfun->sriov.vbars[bar_idx]; vf_vbar->base_hpa += (vf_vbar->size * vf_id); vf_vbar->base_gpa = vf_vbar->base_hpa; + + /* Map VF's BARs when it's first created. */ + if (vf_vbar->base_gpa != 0UL) { + struct acrn_vm *vm = vpci2vm(vf_vdev->vpci); + ept_add_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp), vf_vbar->base_hpa, + vf_vbar->base_gpa, vf_vbar->size, EPT_WR | EPT_RD | EPT_UNCACHED); + } + if (has_msix_cap(vf_vdev) && (bar_idx == vf_vdev->msix.table_bar)) { vf_vdev->msix.mmio_hpa = vf_vbar->base_hpa; vf_vdev->msix.mmio_size = vf_vbar->size; + vdev_pt_map_msix(vf_vdev, false); } + /* * VF BARs value are zero and read only, according to PCI Express * Base 4.0 chapter 9.3.4.1.11, the VF */ pci_vdev_write_vcfg(vf_vdev, pci_bar_offset(bar_idx), 4U, 0U); } - - if (has_msix_cap(vf_vdev)) { - vdev_pt_map_msix(vf_vdev, false); - } } }