diff --git a/hypervisor/Makefile b/hypervisor/Makefile index 813741e75..8d5e78511 100644 --- a/hypervisor/Makefile +++ b/hypervisor/Makefile @@ -137,8 +137,8 @@ C_SRCS += arch/x86/seed/seed_sbl.c # configuration component C_SRCS += arch/x86/configs/vm_config.c -ifeq ($(CONFIG_PARTITION_MODE),y) C_SRCS += arch/x86/configs/$(CONFIG_BOARD)/ve820.c +ifeq ($(CONFIG_PARTITION_MODE),y) C_SRCS += arch/x86/configs/$(CONFIG_BOARD)/pt_dev.c endif diff --git a/hypervisor/arch/x86/configs/apl-mrb/ve820.c b/hypervisor/arch/x86/configs/apl-mrb/ve820.c index a5c5332da..ccf096a84 100644 --- a/hypervisor/arch/x86/configs/apl-mrb/ve820.c +++ b/hypervisor/arch/x86/configs/apl-mrb/ve820.c @@ -5,8 +5,10 @@ */ #include +#include -const struct e820_entry ve820_entry[E820_MAX_ENTRIES] = { +#define VE820_ENTRIES_APL_MRB 5U +static const struct e820_entry ve820_entry[VE820_ENTRIES_APL_MRB] = { { /* usable RAM under 1MB */ .baseaddr = 0x0UL, .length = 0xF0000UL, /* 960KB */ @@ -37,3 +39,12 @@ const struct e820_entry ve820_entry[E820_MAX_ENTRIES] = { .type = E820_TYPE_RESERVED }, }; + +/** + * @pre vm != NULL + */ +void create_prelaunched_vm_e820(struct acrn_vm *vm) +{ + vm->e820_entry_num = VE820_ENTRIES_APL_MRB; + vm->e820_entries = (struct e820_entry *)ve820_entry; +} diff --git a/hypervisor/arch/x86/configs/apl-up2/ve820.c b/hypervisor/arch/x86/configs/apl-up2/ve820.c new file mode 100644 index 000000000..c1e5bedd3 --- /dev/null +++ b/hypervisor/arch/x86/configs/apl-up2/ve820.c @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2019 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include + +/** + * @pre vm != NULL + */ +void create_prelaunched_vm_e820(struct acrn_vm *vm) +{ + vm->e820_entry_num = 0U; + vm->e820_entries = NULL; +} diff --git a/hypervisor/arch/x86/configs/dnv-cb2/ve820.c b/hypervisor/arch/x86/configs/dnv-cb2/ve820.c index 73d589e0e..1fb23d237 100644 --- a/hypervisor/arch/x86/configs/dnv-cb2/ve820.c +++ b/hypervisor/arch/x86/configs/dnv-cb2/ve820.c @@ -5,8 +5,10 @@ */ #include +#include -const struct e820_entry ve820_entry[E820_MAX_ENTRIES] = { +#define VE820_ENTRIES_DNV_CB2 5U +static const struct e820_entry ve820_entry[VE820_ENTRIES_DNV_CB2] = { { /* usable RAM under 1MB */ .baseaddr = 0x0UL, .length = 0xF0000UL, /* 960KB */ @@ -37,3 +39,12 @@ const struct e820_entry ve820_entry[E820_MAX_ENTRIES] = { .type = E820_TYPE_RESERVED }, }; + +/** + * @pre vm != NULL + */ +void create_prelaunched_vm_e820(struct acrn_vm *vm) +{ + vm->e820_entry_num = VE820_ENTRIES_DNV_CB2; + vm->e820_entries = (struct e820_entry *)ve820_entry; +} diff --git a/hypervisor/arch/x86/configs/nuc6cayh/ve820.c b/hypervisor/arch/x86/configs/nuc6cayh/ve820.c new file mode 100644 index 000000000..c1e5bedd3 --- /dev/null +++ b/hypervisor/arch/x86/configs/nuc6cayh/ve820.c @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2019 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include + +/** + * @pre vm != NULL + */ +void create_prelaunched_vm_e820(struct acrn_vm *vm) +{ + vm->e820_entry_num = 0U; + vm->e820_entries = NULL; +} diff --git a/hypervisor/arch/x86/configs/nuc7i7bnh/ve820.c b/hypervisor/arch/x86/configs/nuc7i7bnh/ve820.c new file mode 100644 index 000000000..c1e5bedd3 --- /dev/null +++ b/hypervisor/arch/x86/configs/nuc7i7bnh/ve820.c @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2019 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include + +/** + * @pre vm != NULL + */ +void create_prelaunched_vm_e820(struct acrn_vm *vm) +{ + vm->e820_entry_num = 0U; + vm->e820_entries = NULL; +} diff --git a/hypervisor/arch/x86/guest/vm.c b/hypervisor/arch/x86/guest/vm.c index 30eea19cb..981a0b9de 100644 --- a/hypervisor/arch/x86/guest/vm.c +++ b/hypervisor/arch/x86/guest/vm.c @@ -24,6 +24,7 @@ #include #include #include +#include vm_sw_loader_t vm_sw_loader; @@ -145,15 +146,7 @@ uint16_t get_vm_pcpu_nums(const struct acrn_vm_config *vm_config) } return pcpu_num; } - -/** - * @pre vm != NULL - */ -static void create_prelaunched_vm_e820(struct acrn_vm *vm) -{ - vm->e820_entry_num = E820_MAX_ENTRIES; - vm->e820_entries = (struct e820_entry *)ve820_entry; -} +#endif /** * @pre vm != NULL && vm_config != NULL @@ -187,7 +180,6 @@ static void prepare_prelaunched_vm_memmap(struct acrn_vm *vm, const struct acrn_ } } } -#endif /** * before boot sos_vm(service OS), call it to hide the HV RAM entry in e820 table from sos_vm @@ -368,11 +360,12 @@ int32_t create_vm(uint16_t vm_id, struct acrn_vm_config *vm_config, struct acrn_ (void)memcpy_s(&vm->GUID[0], sizeof(vm->GUID), &vm_config->GUID[0], sizeof(vm_config->GUID)); -#ifdef CONFIG_PARTITION_MODE - create_prelaunched_vm_e820(vm); - prepare_prelaunched_vm_memmap(vm, vm_config); - (void)firmware_init_vm_boot_info(vm); -#endif + + if (vm_config->type == PRE_LAUNCHED_VM) { + create_prelaunched_vm_e820(vm); + prepare_prelaunched_vm_memmap(vm, vm_config); + (void)firmware_init_vm_boot_info(vm); + } } if (status == 0) { diff --git a/hypervisor/include/arch/x86/board.h b/hypervisor/include/arch/x86/board.h index b38cee24e..ebc87b7fe 100644 --- a/hypervisor/include/arch/x86/board.h +++ b/hypervisor/include/arch/x86/board.h @@ -8,6 +8,9 @@ #include +/* forward declarations */ +struct acrn_vm; + struct platform_clos_info { uint32_t clos_mask; uint32_t msr_index; @@ -16,4 +19,7 @@ struct platform_clos_info { extern struct platform_clos_info platform_clos_array[]; extern uint16_t platform_clos_num; +/* board specific functions */ +void create_prelaunched_vm_e820(struct acrn_vm *vm); + #endif /* BOARD_H */ diff --git a/hypervisor/include/arch/x86/e820.h b/hypervisor/include/arch/x86/e820.h index 2c34305b2..b8e038e2b 100644 --- a/hypervisor/include/arch/x86/e820.h +++ b/hypervisor/include/arch/x86/e820.h @@ -34,8 +34,6 @@ struct e820_mem_params { uint64_t total_mem_size; }; -extern const struct e820_entry ve820_entry[E820_MAX_ENTRIES]; - /* HV read multiboot header to get e820 entries info and calc total RAM info */ void init_e820(void);