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hv: Fix typo of trampline with trampoline

Browse Source 
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yin Fengwei 2018-06-11 12:31:25 +00:00 committed by lijinxia
parent 7d13e5be1b
commit 5414d57ac4
10 changed files with 92 additions and 92 deletions
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2
hypervisor/Makefile
View File

@ -90,7 +90,7 @@ C_SRCS += boot/acpi.c
C_SRCS += boot/dmar_parse.c C_SRCS += boot/dmar_parse.c
C_SRCS += arch/x86/ioapic.c C_SRCS += arch/x86/ioapic.c
C_SRCS += arch/x86/intr_lapic.c C_SRCS += arch/x86/intr_lapic.c
S_SRCS += arch/x86/trampline.S S_SRCS += arch/x86/trampoline.S
C_SRCS += arch/x86/cpu.c C_SRCS += arch/x86/cpu.c
C_SRCS += arch/x86/softirq.c C_SRCS += arch/x86/softirq.c
C_SRCS += arch/x86/cpuid.c C_SRCS += arch/x86/cpuid.c

40
hypervisor/arch/x86/cpu.c
View File

@ -12,7 +12,7 @@
#include <acrn_efi.h> #include <acrn_efi.h>
#endif #endif
spinlock_t trampline_spinlock = { spinlock_t trampoline_spinlock = {
.head = 0, .head = 0,
.tail = 0 .tail = 0
}; };
@ -30,7 +30,7 @@ volatile uint32_t up_count = 0;
/* physical cpu active bitmap, support up to 64 cpus */ /* physical cpu active bitmap, support up to 64 cpus */
uint64_t pcpu_active_bitmap = 0; uint64_t pcpu_active_bitmap = 0;
uint64_t trampline_start16_paddr; uint64_t trampoline_start16_paddr;
/* TODO: add more capability per requirement */ /* TODO: add more capability per requirement */
/*APICv features*/ /*APICv features*/
@ -580,7 +580,7 @@ void cpu_secondary_init(void)
/* Release secondary boot spin-lock to allow one of the next CPU(s) to /* Release secondary boot spin-lock to allow one of the next CPU(s) to
* perform this common initialization * perform this common initialization
*/ */
spinlock_release(&trampline_spinlock); spinlock_release(&trampoline_spinlock);
/* Initialize secondary processor interrupts. */ /* Initialize secondary processor interrupts. */
interrupt_init(get_cpu_id()); interrupt_init(get_cpu_id());
@ -612,7 +612,7 @@ int cpu_find_logical_id(uint32_t lapic_id)
return -1; return -1;
} }
static void update_trampline_code_refs(uint64_t dest_pa) static void update_trampoline_code_refs(uint64_t dest_pa)
{ {
void *ptr; void *ptr;
uint64_t val; uint64_t val;
@ -622,15 +622,15 @@ static void update_trampline_code_refs(uint64_t dest_pa)
* calculate the fixup CS:IP according to fixup target address * calculate the fixup CS:IP according to fixup target address
* dynamically. * dynamically.
* *
* trampline code starts in real mode, * trampoline code starts in real mode,
* so the target addres is HPA * so the target addres is HPA
*/ */
val = dest_pa + (uint64_t)trampline_fixup_target; val = dest_pa + (uint64_t)trampoline_fixup_target;
ptr = HPA2HVA(dest_pa + (uint64_t)trampline_fixup_cs); ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_fixup_cs);
*(uint16_t *)(ptr) = (uint16_t)(val >> 4) & 0xFFFF; *(uint16_t *)(ptr) = (uint16_t)(val >> 4) & 0xFFFF;
ptr = HPA2HVA(dest_pa + (uint64_t)trampline_fixup_ip); ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_fixup_ip);
*(uint16_t *)(ptr) = (uint16_t)(val & 0xf); *(uint16_t *)(ptr) = (uint16_t)(val & 0xf);
/* Update temporary page tables */ /* Update temporary page tables */
@ -640,36 +640,36 @@ static void update_trampline_code_refs(uint64_t dest_pa)
ptr = HPA2HVA(dest_pa + (uint64_t)CPU_Boot_Page_Tables_Start); ptr = HPA2HVA(dest_pa + (uint64_t)CPU_Boot_Page_Tables_Start);
*(uint64_t *)(ptr) += dest_pa; *(uint64_t *)(ptr) += dest_pa;
ptr = HPA2HVA(dest_pa + (uint64_t)trampline_pdpt_addr); ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_pdpt_addr);
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
*(uint64_t *)(ptr + sizeof(uint64_t) * i) += dest_pa; *(uint64_t *)(ptr + sizeof(uint64_t) * i) += dest_pa;
/* update the gdt base pointer with relocated offset */ /* update the gdt base pointer with relocated offset */
ptr = HPA2HVA(dest_pa + (uint64_t)trampline_gdt_ptr); ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_gdt_ptr);
*(uint64_t *)(ptr + 2) += dest_pa; *(uint64_t *)(ptr + 2) += dest_pa;
/* update trampline jump pointer with relocated offset */ /* update trampoline jump pointer with relocated offset */
ptr = HPA2HVA(dest_pa + (uint64_t)trampline_start64_fixup); ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_start64_fixup);
*(uint32_t *)ptr += dest_pa; *(uint32_t *)ptr += dest_pa;
} }
static uint64_t prepare_trampline(void) static uint64_t prepare_trampoline(void)
{ {
uint64_t size, dest_pa; uint64_t size, dest_pa;
size = (uint64_t)_ld_trampline_end - (uint64_t)trampline_start16; size = (uint64_t)_ld_trampoline_end - (uint64_t)trampoline_start16;
#ifndef CONFIG_EFI_STUB #ifndef CONFIG_EFI_STUB
dest_pa = e820_alloc_low_memory(CONFIG_LOW_RAM_SIZE); dest_pa = e820_alloc_low_memory(CONFIG_LOW_RAM_SIZE);
#else #else
dest_pa = (uint64_t)get_ap_trampline_buf(); dest_pa = (uint64_t)get_ap_trampoline_buf();
#endif #endif
pr_dbg("trampline code: %llx size %x", dest_pa, size); pr_dbg("trampoline code: %llx size %x", dest_pa, size);
/* Copy segment for AP initialization code below 1MB */ /* Copy segment for AP initialization code below 1MB */
memcpy_s(HPA2HVA(dest_pa), size, _ld_trampline_load, size); memcpy_s(HPA2HVA(dest_pa), size, _ld_trampoline_load, size);
update_trampline_code_refs(dest_pa); update_trampoline_code_refs(dest_pa);
trampline_start16_paddr = dest_pa; trampoline_start16_paddr = dest_pa;
return dest_pa; return dest_pa;
} }
@ -683,7 +683,7 @@ void start_cpus()
uint32_t expected_up; uint32_t expected_up;
uint64_t startup_paddr; uint64_t startup_paddr;
startup_paddr = prepare_trampline(); startup_paddr = prepare_trampoline();
/* Set flag showing number of CPUs expected to be up to all /* Set flag showing number of CPUs expected to be up to all
* cpus * cpus

12
hypervisor/arch/x86/guest/guest.c
View File

@ -676,10 +676,10 @@ uint64_t e820_alloc_low_memory(uint32_t size)
* *
* FIXME: here the guest init page table will occupy at most * FIXME: here the guest init page table will occupy at most
* GUEST_INIT_PT_PAGE_NUM pages. Some check here: * GUEST_INIT_PT_PAGE_NUM pages. Some check here:
* - guest page table space should not override trampline code area * - guest page table space should not override trampoline code area
* (it's a little tricky here, as under current identical mapping, HV & SOS * (it's a little tricky here, as under current identical mapping, HV & SOS
* share same memory under 1M; under uefi boot mode, the defered AP startup * share same memory under 1M; under uefi boot mode, the defered AP startup
* need trampline code area which reserved by uefi stub keep there * need trampoline code area which reserved by uefi stub keep there
* no change even after SOS startup) * no change even after SOS startup)
* - guest page table space should not override possible RSDP fix segment * - guest page table space should not override possible RSDP fix segment
* *
@ -687,7 +687,7 @@ uint64_t e820_alloc_low_memory(uint32_t size)
* after guest realmode/32bit no paging mode got supported. * after guest realmode/32bit no paging mode got supported.
******************************************************************/ ******************************************************************/
#define GUEST_INIT_PAGE_TABLE_SKIP_SIZE 0x8000UL #define GUEST_INIT_PAGE_TABLE_SKIP_SIZE 0x8000UL
#define GUEST_INIT_PAGE_TABLE_START (trampline_start16_paddr + \ #define GUEST_INIT_PAGE_TABLE_START (trampoline_start16_paddr + \
GUEST_INIT_PAGE_TABLE_SKIP_SIZE) GUEST_INIT_PAGE_TABLE_SKIP_SIZE)
#define GUEST_INIT_PT_PAGE_NUM 7 #define GUEST_INIT_PT_PAGE_NUM 7
#define RSDP_F_ADDR 0xE0000 #define RSDP_F_ADDR 0xE0000
@ -707,8 +707,8 @@ uint64_t create_guest_initial_paging(struct vm *vm)
RSDP_F_ADDR, "RSDP fix segment could be override"); RSDP_F_ADDR, "RSDP fix segment could be override");
if (GUEST_INIT_PAGE_TABLE_SKIP_SIZE < if (GUEST_INIT_PAGE_TABLE_SKIP_SIZE <
(unsigned long)&_ld_trampline_size) { (unsigned long)&_ld_trampoline_size) {
panic("guest init PTs override trampline code"); panic("guest init PTs override trampoline code");
} }
/* Using continuous memory for guest page tables, the total 4K page /* Using continuous memory for guest page tables, the total 4K page
@ -793,7 +793,7 @@ uint64_t create_guest_initial_paging(struct vm *vm)
******************************************************************/ ******************************************************************/
#define GUEST_INIT_GDT_SKIP_SIZE 0x8000UL #define GUEST_INIT_GDT_SKIP_SIZE 0x8000UL
#define GUEST_INIT_GDT_START (trampline_start16_paddr + \ #define GUEST_INIT_GDT_START (trampoline_start16_paddr + \
GUEST_INIT_GDT_SKIP_SIZE) GUEST_INIT_GDT_SKIP_SIZE)
/* The GDT defined below compatible with linux kernel */ /* The GDT defined below compatible with linux kernel */

80
hypervisor/arch/x86/trampline.S → hypervisor/arch/x86/trampoline.S
View File

@ -5,8 +5,8 @@
* *
* This is entry for AP startup and BSP S3 wakeup * This is entry for AP startup and BSP S3 wakeup
* *
* When system jump to trampline_start16, the CPU is in x86 real * When system jump to trampoline_start16, the CPU is in x86 real
* mode with no stack setup. CS:IP points to trampline_start16. * mode with no stack setup. CS:IP points to trampoline_start16.
* *
* The CPU will be changed to long mode finally with temperay * The CPU will be changed to long mode finally with temperay
* page table and gdt in this file. Then jump to different C main * page table and gdt in this file. Then jump to different C main
@ -26,13 +26,13 @@
.extern _ld_bss_end .extern _ld_bss_end
.extern HOST_GDTR .extern HOST_GDTR
.section .trampline_reset,"ax" .section .trampoline_reset,"ax"
.align 4 .align 4
.code16 .code16
.global trampline_start16 .global trampoline_start16
.org 0 .org 0
trampline_start16: trampoline_start16:
/* Disable local interrupts */ /* Disable local interrupts */
cli cli
@ -41,38 +41,38 @@ trampline_start16:
* There are two paths system could come here: * There are two paths system could come here:
* - AP startup * - AP startup
* Silicon will set AP to real mode and setup CS:IP before * Silicon will set AP to real mode and setup CS:IP before
* jmp to trampline_start16. And the IP is always 0 for sure. * jmp to trampoline_start16. And the IP is always 0 for sure.
* - BSP wakeup from S3 * - BSP wakeup from S3
* Some bootloader (like ABL) doesn't guarante IP is set to * Some bootloader (like ABL) doesn't guarante IP is set to
* zero before jump to trampline_start16 after system resume * zero before jump to trampoline_start16 after system resume
* from S3. * from S3.
* *
* To make trampline code could work with all these cases, a far * To make trampoline code could work with all these cases, a far
* jump is issued here as fixup. It will update the CS:IP according * jump is issued here as fixup. It will update the CS:IP according
* to where the trampline code is located. * to where the trampoline code is located.
* *
* Here, we issue a far jump with "JMP ptr16:16" format (please refer * Here, we issue a far jump with "JMP ptr16:16" format (please refer
* sdm vol2A - JMP instruction description). The jump target is set * sdm vol2A - JMP instruction description). The jump target is set
* to trampline_fixup_target_addr. From trampline_fixup_target_addr, * to trampoline_fixup_target_addr. From trampoline_fixup_target_addr,
* The CS has same value for both AP startup and BSP wakeup from S3. * The CS has same value for both AP startup and BSP wakeup from S3.
* *
* Because the limitation of real mode (can't access ip register * Because the limitation of real mode (can't access ip register
* directly. So can't setup the trampline_fixup_ip and * directly. So can't setup the trampoline_fixup_ip and
* trampline_fixup_cs), we have to update the trampline_fixup_ip * trampoline_fixup_cs), we have to update the trampoline_fixup_ip
* and trampline_fixup_cs when we preparing the trampline code. * and trampoline_fixup_cs when we preparing the trampoline code.
* *
* Refer to preparing_trampline() for fixup CS:IP setup * Refer to preparing_trampoline() for fixup CS:IP setup
*/ */
.byte 0xea /* Opcode of "JMP ptr16:16" */ .byte 0xea /* Opcode of "JMP ptr16:16" */
.global trampline_fixup_ip .global trampoline_fixup_ip
trampline_fixup_ip: trampoline_fixup_ip:
.word 0 /* "EIP is intruction following JUMP instruction" */ .word 0 /* "EIP is intruction following JUMP instruction" */
.global trampline_fixup_cs .global trampoline_fixup_cs
trampline_fixup_cs: trampoline_fixup_cs:
.word 0 /* CS */ .word 0 /* CS */
.global trampline_fixup_target .global trampoline_fixup_target
trampline_fixup_target: trampoline_fixup_target:
mov %cs, %ax mov %cs, %ax
mov %ax, %ds mov %ax, %ds
@ -102,21 +102,21 @@ trampline_fixup_target:
mov %ebx, %cr0 mov %ebx, %cr0
/* Load temportary GDT pointer value */ /* Load temportary GDT pointer value */
lgdt (trampline_gdt_ptr - trampline_start16) lgdt (trampoline_gdt_ptr - trampoline_start16)
/* Perform a long jump based to start executing in 64-bit mode */ /* Perform a long jump based to start executing in 64-bit mode */
movl $trampline_start64_fixup, %ebx movl $trampoline_start64_fixup, %ebx
ljmpl *(%ebx) ljmpl *(%ebx)
.align 8 .align 8
.global trampline_start64_fixup .global trampoline_start64_fixup
trampline_start64_fixup: trampoline_start64_fixup:
.long trampline_start64 .long trampoline_start64
.word HOST_GDT_RING0_CODE_SEL .word HOST_GDT_RING0_CODE_SEL
.code64 .code64
trampline_start64: trampoline_start64:
/* Set up all other data segment registers */ /* Set up all other data segment registers */
@ -127,8 +127,8 @@ trampline_start64:
mov %eax, %fs mov %eax, %fs
mov %eax, %gs mov %eax, %gs
/* Obtain CPU spin-lock to serialize trampline for different APs */ /* Obtain CPU spin-lock to serialize trampoline for different APs */
mov $trampline_spinlock, %rdi mov $trampoline_spinlock, %rdi
spinlock_obtain(%rdi) spinlock_obtain(%rdi)
/* Initialize temporary stack pointer /* Initialize temporary stack pointer
@ -140,7 +140,7 @@ trampline_start64:
used for a VERY short period of time, so used for a VERY short period of time, so
this reuse of PML4 memory should be acceptable. */ this reuse of PML4 memory should be acceptable. */
lea trampline_pdpt_addr(%rip), %rsp lea trampoline_pdpt_addr(%rip), %rsp
/* Push sp magic to top of stack for call trace */ /* Push sp magic to top of stack for call trace */
pushq $SP_BOTTOM_MAGIC pushq $SP_BOTTOM_MAGIC
@ -158,18 +158,18 @@ main_entry:
/* GDT table */ /* GDT table */
.align 4 .align 4
trampline_gdt: trampoline_gdt:
.quad 0x0000000000000000 .quad 0x0000000000000000
.quad 0x00af9b000000ffff .quad 0x00af9b000000ffff
.quad 0x00cf93000000ffff .quad 0x00cf93000000ffff
trampline_gdt_end: trampoline_gdt_end:
/* GDT pointer */ /* GDT pointer */
.align 2 .align 2
.global trampline_gdt_ptr .global trampoline_gdt_ptr
trampline_gdt_ptr: trampoline_gdt_ptr:
.short (trampline_gdt_end - trampline_gdt) - 1 .short (trampoline_gdt_end - trampoline_gdt) - 1
.quad trampline_gdt .quad trampoline_gdt
/* PML4, PDPT, and PD tables initialized to map first 4 GBytes of memory */ /* PML4, PDPT, and PD tables initialized to map first 4 GBytes of memory */
.align 4 .align 4
@ -180,18 +180,18 @@ CPU_Boot_Page_Tables_ptr:
.align CPU_PAGE_SIZE .align CPU_PAGE_SIZE
.global CPU_Boot_Page_Tables_Start .global CPU_Boot_Page_Tables_Start
CPU_Boot_Page_Tables_Start: CPU_Boot_Page_Tables_Start:
.quad trampline_pdpt_addr + (IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT) .quad trampoline_pdpt_addr + (IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT)
.align CPU_PAGE_SIZE .align CPU_PAGE_SIZE
.global trampline_pdpt_addr .global trampoline_pdpt_addr
trampline_pdpt_addr: trampoline_pdpt_addr:
address = 0 address = 0
.rept 4 .rept 4
.quad trampline_pdt_addr + address + \ .quad trampoline_pdt_addr + address + \
(IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT) (IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT)
address = address + CPU_PAGE_SIZE address = address + CPU_PAGE_SIZE
.endr .endr
.align CPU_PAGE_SIZE .align CPU_PAGE_SIZE
trampline_pdt_addr: trampoline_pdt_addr:
address = 0 address = 0
.rept 2048 .rept 2048
.quad address + (IA32E_PDPTE_PS_BIT | IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT) .quad address + (IA32E_PDPTE_PS_BIT | IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT)

14
hypervisor/bsp/ld/link_ram.ld.in
View File

@ -39,20 +39,20 @@ SECTIONS
} > ram } > ram
_ld_trampline_load = .; _ld_trampoline_load = .;
.trampline : AT (_ld_trampline_load) .trampoline : AT (_ld_trampoline_load)
{ {
_ld_trampline_start = .; _ld_trampoline_start = .;
*(.trampline_reset); *(.trampoline_reset);
. = ALIGN(4); . = ALIGN(4);
_ld_trampline_end = .; _ld_trampoline_end = .;
} > lowram } > lowram
_ld_trampline_size = _ld_trampline_end - _ld_trampline_start; _ld_trampoline_size = _ld_trampoline_end - _ld_trampoline_start;
.data (_ld_trampline_load + _ld_trampline_size): .data (_ld_trampoline_load + _ld_trampoline_size):
{ {
*(.data) ; *(.data) ;
*(.data*) ; *(.data*) ;

2
hypervisor/bsp/uefi/efi/boot.c
View File

@ -226,7 +226,7 @@ switch_to_guest_mode(EFI_HANDLE image)
if (err != EFI_SUCCESS) if (err != EFI_SUCCESS)
goto out; goto out;
efi_ctx->ap_trampline_buf = (void *)addr; efi_ctx->ap_trampoline_buf = (void *)addr;
config_table = sys_table->ConfigurationTable; config_table = sys_table->ConfigurationTable;

2
hypervisor/bsp/uefi/efi/boot.h
View File

@ -95,7 +95,7 @@ struct e820_entry {
struct efi_ctx { struct efi_ctx {
uint64_t rip; uint64_t rip;
VOID *rsdp; VOID *rsdp;
VOID *ap_trampline_buf; VOID *ap_trampoline_buf;
dt_addr_t gdt; dt_addr_t gdt;
dt_addr_t idt; dt_addr_t idt;
uint16_t tr_sel; uint16_t tr_sel;

4
hypervisor/bsp/uefi/uefi.c
View File

@ -97,9 +97,9 @@ void *get_rsdp_from_uefi(void)
return HPA2HVA(efi_ctx->rsdp); return HPA2HVA(efi_ctx->rsdp);
} }
void *get_ap_trampline_buf(void) void *get_ap_trampoline_buf(void)
{ {
return efi_ctx->ap_trampline_buf; return efi_ctx->ap_trampoline_buf;
} }
static void efi_init(void) static void efi_init(void)

24
hypervisor/include/arch/x86/cpu.h
View File

@ -156,23 +156,23 @@ int cpu_find_logical_id(uint32_t lapic_id);
/**********************************/ /**********************************/
/* EXTERNAL VARIABLES */ /* EXTERNAL VARIABLES */
/**********************************/ /**********************************/
extern const uint8_t _ld_trampline_load[]; extern const uint8_t _ld_trampoline_load[];
extern uint8_t _ld_trampline_start[]; extern uint8_t _ld_trampoline_start[];
extern uint8_t _ld_trampline_end[]; extern uint8_t _ld_trampoline_end[];
extern const uint64_t _ld_trampline_size; extern const uint64_t _ld_trampoline_size;
extern uint8_t _ld_bss_start[]; extern uint8_t _ld_bss_start[];
extern uint8_t _ld_bss_end[]; extern uint8_t _ld_bss_end[];
extern uint8_t trampline_fixup_cs[]; extern uint8_t trampoline_fixup_cs[];
extern uint8_t trampline_fixup_ip[]; extern uint8_t trampoline_fixup_ip[];
extern uint8_t trampline_fixup_target[]; extern uint8_t trampoline_fixup_target[];
extern uint8_t CPU_Boot_Page_Tables_Start[]; extern uint8_t CPU_Boot_Page_Tables_Start[];
extern uint8_t CPU_Boot_Page_Tables_ptr[]; extern uint8_t CPU_Boot_Page_Tables_ptr[];
extern uint8_t trampline_pdpt_addr[]; extern uint8_t trampoline_pdpt_addr[];
extern uint8_t trampline_gdt_ptr[]; extern uint8_t trampoline_gdt_ptr[];
extern uint8_t trampline_start64_fixup[]; extern uint8_t trampoline_start64_fixup[];
extern uint64_t trampline_start16_paddr; extern uint64_t trampoline_start16_paddr;
extern int ibrs_type; extern int ibrs_type;
/* /*
@ -250,7 +250,7 @@ extern struct cpuinfo_x86 boot_cpu_data;
/* Function prototypes */ /* Function prototypes */
void cpu_dead(uint32_t logical_id); void cpu_dead(uint32_t logical_id);
void trampline_start16(void); void trampoline_start16(void);
int hv_main(int cpu_id); int hv_main(int cpu_id);
bool is_vapic_supported(void); bool is_vapic_supported(void);
bool is_vapic_intr_delivery_supported(void); bool is_vapic_intr_delivery_supported(void);

4
hypervisor/include/common/acrn_efi.h
View File

@ -15,7 +15,7 @@ typedef struct {
struct efi_ctx { struct efi_ctx {
uint64_t rip; uint64_t rip;
void *rsdp; void *rsdp;
void *ap_trampline_buf; void *ap_trampoline_buf;
dt_addr_t gdt; dt_addr_t gdt;
dt_addr_t idt; dt_addr_t idt;
uint16_t tr_sel; uint16_t tr_sel;
@ -51,6 +51,6 @@ struct efi_ctx {
}__attribute__((packed)); }__attribute__((packed));
void *get_rsdp_from_uefi(void); void *get_rsdp_from_uefi(void);
void *get_ap_trampline_buf(void); void *get_ap_trampoline_buf(void);
#endif /* UEFI_H*/ #endif /* UEFI_H*/