mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-07-03 10:36:34 +00:00
hv: Fix typo of trampline with trampoline
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yin Fengwei
lijinxia
parent
7d13e5be1b
commit
5414d57ac4
@ -90,7 +90,7 @@ C_SRCS += boot/acpi.c
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C_SRCS += boot/dmar_parse.c
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C_SRCS += arch/x86/ioapic.c
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C_SRCS += arch/x86/intr_lapic.c
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S_SRCS += arch/x86/trampline.S
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S_SRCS += arch/x86/trampoline.S
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C_SRCS += arch/x86/cpu.c
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C_SRCS += arch/x86/softirq.c
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C_SRCS += arch/x86/cpuid.c
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@ -12,7 +12,7 @@
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#include <acrn_efi.h>
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#endif
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spinlock_t trampline_spinlock = {
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spinlock_t trampoline_spinlock = {
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.head = 0,
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.tail = 0
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};
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@ -30,7 +30,7 @@ volatile uint32_t up_count = 0;
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/* physical cpu active bitmap, support up to 64 cpus */
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uint64_t pcpu_active_bitmap = 0;
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uint64_t trampline_start16_paddr;
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uint64_t trampoline_start16_paddr;
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/* TODO: add more capability per requirement */
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/*APICv features*/
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@ -580,7 +580,7 @@ void cpu_secondary_init(void)
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/* Release secondary boot spin-lock to allow one of the next CPU(s) to
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* perform this common initialization
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*/
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spinlock_release(&trampline_spinlock);
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spinlock_release(&trampoline_spinlock);
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/* Initialize secondary processor interrupts. */
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interrupt_init(get_cpu_id());
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@ -612,7 +612,7 @@ int cpu_find_logical_id(uint32_t lapic_id)
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return -1;
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}
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static void update_trampline_code_refs(uint64_t dest_pa)
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static void update_trampoline_code_refs(uint64_t dest_pa)
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{
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void *ptr;
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uint64_t val;
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@ -622,15 +622,15 @@ static void update_trampline_code_refs(uint64_t dest_pa)
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* calculate the fixup CS:IP according to fixup target address
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* dynamically.
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*
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* trampline code starts in real mode,
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* trampoline code starts in real mode,
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* so the target addres is HPA
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*/
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val = dest_pa + (uint64_t)trampline_fixup_target;
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val = dest_pa + (uint64_t)trampoline_fixup_target;
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ptr = HPA2HVA(dest_pa + (uint64_t)trampline_fixup_cs);
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ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_fixup_cs);
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*(uint16_t *)(ptr) = (uint16_t)(val >> 4) & 0xFFFF;
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ptr = HPA2HVA(dest_pa + (uint64_t)trampline_fixup_ip);
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ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_fixup_ip);
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*(uint16_t *)(ptr) = (uint16_t)(val & 0xf);
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/* Update temporary page tables */
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@ -640,36 +640,36 @@ static void update_trampline_code_refs(uint64_t dest_pa)
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ptr = HPA2HVA(dest_pa + (uint64_t)CPU_Boot_Page_Tables_Start);
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*(uint64_t *)(ptr) += dest_pa;
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ptr = HPA2HVA(dest_pa + (uint64_t)trampline_pdpt_addr);
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ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_pdpt_addr);
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for (i = 0; i < 4; i++)
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*(uint64_t *)(ptr + sizeof(uint64_t) * i) += dest_pa;
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/* update the gdt base pointer with relocated offset */
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ptr = HPA2HVA(dest_pa + (uint64_t)trampline_gdt_ptr);
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ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_gdt_ptr);
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*(uint64_t *)(ptr + 2) += dest_pa;
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/* update trampline jump pointer with relocated offset */
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ptr = HPA2HVA(dest_pa + (uint64_t)trampline_start64_fixup);
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/* update trampoline jump pointer with relocated offset */
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ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_start64_fixup);
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*(uint32_t *)ptr += dest_pa;
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}
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static uint64_t prepare_trampline(void)
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static uint64_t prepare_trampoline(void)
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{
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uint64_t size, dest_pa;
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size = (uint64_t)_ld_trampline_end - (uint64_t)trampline_start16;
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size = (uint64_t)_ld_trampoline_end - (uint64_t)trampoline_start16;
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#ifndef CONFIG_EFI_STUB
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dest_pa = e820_alloc_low_memory(CONFIG_LOW_RAM_SIZE);
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#else
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dest_pa = (uint64_t)get_ap_trampline_buf();
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dest_pa = (uint64_t)get_ap_trampoline_buf();
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#endif
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pr_dbg("trampline code: %llx size %x", dest_pa, size);
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pr_dbg("trampoline code: %llx size %x", dest_pa, size);
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/* Copy segment for AP initialization code below 1MB */
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memcpy_s(HPA2HVA(dest_pa), size, _ld_trampline_load, size);
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update_trampline_code_refs(dest_pa);
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trampline_start16_paddr = dest_pa;
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memcpy_s(HPA2HVA(dest_pa), size, _ld_trampoline_load, size);
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update_trampoline_code_refs(dest_pa);
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trampoline_start16_paddr = dest_pa;
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return dest_pa;
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}
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@ -683,7 +683,7 @@ void start_cpus()
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uint32_t expected_up;
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uint64_t startup_paddr;
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startup_paddr = prepare_trampline();
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startup_paddr = prepare_trampoline();
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/* Set flag showing number of CPUs expected to be up to all
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* cpus
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@ -676,10 +676,10 @@ uint64_t e820_alloc_low_memory(uint32_t size)
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*
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* FIXME: here the guest init page table will occupy at most
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* GUEST_INIT_PT_PAGE_NUM pages. Some check here:
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* - guest page table space should not override trampline code area
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* - guest page table space should not override trampoline code area
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* (it's a little tricky here, as under current identical mapping, HV & SOS
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* share same memory under 1M; under uefi boot mode, the defered AP startup
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* need trampline code area which reserved by uefi stub keep there
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* need trampoline code area which reserved by uefi stub keep there
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* no change even after SOS startup)
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* - guest page table space should not override possible RSDP fix segment
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*
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@ -687,7 +687,7 @@ uint64_t e820_alloc_low_memory(uint32_t size)
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* after guest realmode/32bit no paging mode got supported.
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******************************************************************/
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#define GUEST_INIT_PAGE_TABLE_SKIP_SIZE 0x8000UL
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#define GUEST_INIT_PAGE_TABLE_START (trampline_start16_paddr + \
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#define GUEST_INIT_PAGE_TABLE_START (trampoline_start16_paddr + \
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GUEST_INIT_PAGE_TABLE_SKIP_SIZE)
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#define GUEST_INIT_PT_PAGE_NUM 7
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#define RSDP_F_ADDR 0xE0000
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@ -707,8 +707,8 @@ uint64_t create_guest_initial_paging(struct vm *vm)
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RSDP_F_ADDR, "RSDP fix segment could be override");
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if (GUEST_INIT_PAGE_TABLE_SKIP_SIZE <
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(unsigned long)&_ld_trampline_size) {
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panic("guest init PTs override trampline code");
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(unsigned long)&_ld_trampoline_size) {
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panic("guest init PTs override trampoline code");
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}
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/* Using continuous memory for guest page tables, the total 4K page
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@ -793,7 +793,7 @@ uint64_t create_guest_initial_paging(struct vm *vm)
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******************************************************************/
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#define GUEST_INIT_GDT_SKIP_SIZE 0x8000UL
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#define GUEST_INIT_GDT_START (trampline_start16_paddr + \
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#define GUEST_INIT_GDT_START (trampoline_start16_paddr + \
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GUEST_INIT_GDT_SKIP_SIZE)
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/* The GDT defined below compatible with linux kernel */
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@ -5,8 +5,8 @@
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*
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* This is entry for AP startup and BSP S3 wakeup
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*
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* When system jump to trampline_start16, the CPU is in x86 real
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* mode with no stack setup. CS:IP points to trampline_start16.
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* When system jump to trampoline_start16, the CPU is in x86 real
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* mode with no stack setup. CS:IP points to trampoline_start16.
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*
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* The CPU will be changed to long mode finally with temperay
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* page table and gdt in this file. Then jump to different C main
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@ -26,13 +26,13 @@
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.extern _ld_bss_end
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.extern HOST_GDTR
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.section .trampline_reset,"ax"
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.section .trampoline_reset,"ax"
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.align 4
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.code16
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.global trampline_start16
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.global trampoline_start16
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.org 0
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trampline_start16:
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trampoline_start16:
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/* Disable local interrupts */
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cli
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@ -41,38 +41,38 @@ trampline_start16:
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* There are two paths system could come here:
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* - AP startup
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* Silicon will set AP to real mode and setup CS:IP before
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* jmp to trampline_start16. And the IP is always 0 for sure.
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* jmp to trampoline_start16. And the IP is always 0 for sure.
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* - BSP wakeup from S3
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* Some bootloader (like ABL) doesn't guarante IP is set to
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* zero before jump to trampline_start16 after system resume
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* zero before jump to trampoline_start16 after system resume
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* from S3.
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*
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* To make trampline code could work with all these cases, a far
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* To make trampoline code could work with all these cases, a far
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* jump is issued here as fixup. It will update the CS:IP according
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* to where the trampline code is located.
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* to where the trampoline code is located.
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*
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* Here, we issue a far jump with "JMP ptr16:16" format (please refer
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* sdm vol2A - JMP instruction description). The jump target is set
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* to trampline_fixup_target_addr. From trampline_fixup_target_addr,
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* to trampoline_fixup_target_addr. From trampoline_fixup_target_addr,
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* The CS has same value for both AP startup and BSP wakeup from S3.
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*
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* Because the limitation of real mode (can't access ip register
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* directly. So can't setup the trampline_fixup_ip and
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* trampline_fixup_cs), we have to update the trampline_fixup_ip
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* and trampline_fixup_cs when we preparing the trampline code.
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* directly. So can't setup the trampoline_fixup_ip and
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* trampoline_fixup_cs), we have to update the trampoline_fixup_ip
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* and trampoline_fixup_cs when we preparing the trampoline code.
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*
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* Refer to preparing_trampline() for fixup CS:IP setup
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* Refer to preparing_trampoline() for fixup CS:IP setup
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*/
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.byte 0xea /* Opcode of "JMP ptr16:16" */
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.global trampline_fixup_ip
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trampline_fixup_ip:
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.global trampoline_fixup_ip
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trampoline_fixup_ip:
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.word 0 /* "EIP is intruction following JUMP instruction" */
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.global trampline_fixup_cs
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trampline_fixup_cs:
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.global trampoline_fixup_cs
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trampoline_fixup_cs:
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.word 0 /* CS */
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.global trampline_fixup_target
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trampline_fixup_target:
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.global trampoline_fixup_target
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trampoline_fixup_target:
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mov %cs, %ax
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mov %ax, %ds
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@ -102,21 +102,21 @@ trampline_fixup_target:
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mov %ebx, %cr0
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/* Load temportary GDT pointer value */
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lgdt (trampline_gdt_ptr - trampline_start16)
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lgdt (trampoline_gdt_ptr - trampoline_start16)
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/* Perform a long jump based to start executing in 64-bit mode */
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movl $trampline_start64_fixup, %ebx
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movl $trampoline_start64_fixup, %ebx
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ljmpl *(%ebx)
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.align 8
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.global trampline_start64_fixup
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trampline_start64_fixup:
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.long trampline_start64
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.global trampoline_start64_fixup
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trampoline_start64_fixup:
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.long trampoline_start64
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.word HOST_GDT_RING0_CODE_SEL
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.code64
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trampline_start64:
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trampoline_start64:
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/* Set up all other data segment registers */
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@ -127,8 +127,8 @@ trampline_start64:
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mov %eax, %fs
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mov %eax, %gs
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/* Obtain CPU spin-lock to serialize trampline for different APs */
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mov $trampline_spinlock, %rdi
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/* Obtain CPU spin-lock to serialize trampoline for different APs */
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mov $trampoline_spinlock, %rdi
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spinlock_obtain(%rdi)
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/* Initialize temporary stack pointer
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@ -140,7 +140,7 @@ trampline_start64:
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used for a VERY short period of time, so
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this reuse of PML4 memory should be acceptable. */
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lea trampline_pdpt_addr(%rip), %rsp
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lea trampoline_pdpt_addr(%rip), %rsp
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/* Push sp magic to top of stack for call trace */
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pushq $SP_BOTTOM_MAGIC
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@ -158,18 +158,18 @@ main_entry:
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/* GDT table */
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.align 4
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trampline_gdt:
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trampoline_gdt:
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.quad 0x0000000000000000
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.quad 0x00af9b000000ffff
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.quad 0x00cf93000000ffff
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trampline_gdt_end:
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trampoline_gdt_end:
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/* GDT pointer */
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.align 2
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.global trampline_gdt_ptr
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trampline_gdt_ptr:
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.short (trampline_gdt_end - trampline_gdt) - 1
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.quad trampline_gdt
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.global trampoline_gdt_ptr
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trampoline_gdt_ptr:
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.short (trampoline_gdt_end - trampoline_gdt) - 1
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.quad trampoline_gdt
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/* PML4, PDPT, and PD tables initialized to map first 4 GBytes of memory */
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.align 4
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@ -180,18 +180,18 @@ CPU_Boot_Page_Tables_ptr:
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.align CPU_PAGE_SIZE
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.global CPU_Boot_Page_Tables_Start
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CPU_Boot_Page_Tables_Start:
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.quad trampline_pdpt_addr + (IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT)
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.quad trampoline_pdpt_addr + (IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT)
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.align CPU_PAGE_SIZE
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.global trampline_pdpt_addr
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trampline_pdpt_addr:
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.global trampoline_pdpt_addr
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trampoline_pdpt_addr:
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address = 0
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.rept 4
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.quad trampline_pdt_addr + address + \
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.quad trampoline_pdt_addr + address + \
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(IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT)
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address = address + CPU_PAGE_SIZE
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.endr
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.align CPU_PAGE_SIZE
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trampline_pdt_addr:
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trampoline_pdt_addr:
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address = 0
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.rept 2048
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.quad address + (IA32E_PDPTE_PS_BIT | IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT)
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@ -39,20 +39,20 @@ SECTIONS
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} > ram
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_ld_trampline_load = .;
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_ld_trampoline_load = .;
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.trampline : AT (_ld_trampline_load)
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.trampoline : AT (_ld_trampoline_load)
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{
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_ld_trampline_start = .;
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*(.trampline_reset);
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_ld_trampoline_start = .;
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*(.trampoline_reset);
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. = ALIGN(4);
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_ld_trampline_end = .;
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_ld_trampoline_end = .;
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} > lowram
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_ld_trampline_size = _ld_trampline_end - _ld_trampline_start;
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_ld_trampoline_size = _ld_trampoline_end - _ld_trampoline_start;
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.data (_ld_trampline_load + _ld_trampline_size):
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.data (_ld_trampoline_load + _ld_trampoline_size):
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{
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*(.data) ;
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*(.data*) ;
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@ -226,7 +226,7 @@ switch_to_guest_mode(EFI_HANDLE image)
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if (err != EFI_SUCCESS)
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goto out;
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efi_ctx->ap_trampline_buf = (void *)addr;
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efi_ctx->ap_trampoline_buf = (void *)addr;
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config_table = sys_table->ConfigurationTable;
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@ -95,7 +95,7 @@ struct e820_entry {
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struct efi_ctx {
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uint64_t rip;
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VOID *rsdp;
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VOID *ap_trampline_buf;
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VOID *ap_trampoline_buf;
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dt_addr_t gdt;
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dt_addr_t idt;
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uint16_t tr_sel;
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@ -97,9 +97,9 @@ void *get_rsdp_from_uefi(void)
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return HPA2HVA(efi_ctx->rsdp);
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}
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void *get_ap_trampline_buf(void)
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void *get_ap_trampoline_buf(void)
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{
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return efi_ctx->ap_trampline_buf;
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return efi_ctx->ap_trampoline_buf;
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}
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static void efi_init(void)
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@ -156,23 +156,23 @@ int cpu_find_logical_id(uint32_t lapic_id);
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/**********************************/
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/* EXTERNAL VARIABLES */
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/**********************************/
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extern const uint8_t _ld_trampline_load[];
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extern uint8_t _ld_trampline_start[];
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extern uint8_t _ld_trampline_end[];
|
||||
extern const uint64_t _ld_trampline_size;
|
||||
extern const uint8_t _ld_trampoline_load[];
|
||||
extern uint8_t _ld_trampoline_start[];
|
||||
extern uint8_t _ld_trampoline_end[];
|
||||
extern const uint64_t _ld_trampoline_size;
|
||||
extern uint8_t _ld_bss_start[];
|
||||
extern uint8_t _ld_bss_end[];
|
||||
|
||||
extern uint8_t trampline_fixup_cs[];
|
||||
extern uint8_t trampline_fixup_ip[];
|
||||
extern uint8_t trampline_fixup_target[];
|
||||
extern uint8_t trampoline_fixup_cs[];
|
||||
extern uint8_t trampoline_fixup_ip[];
|
||||
extern uint8_t trampoline_fixup_target[];
|
||||
extern uint8_t CPU_Boot_Page_Tables_Start[];
|
||||
extern uint8_t CPU_Boot_Page_Tables_ptr[];
|
||||
extern uint8_t trampline_pdpt_addr[];
|
||||
extern uint8_t trampline_gdt_ptr[];
|
||||
extern uint8_t trampline_start64_fixup[];
|
||||
extern uint8_t trampoline_pdpt_addr[];
|
||||
extern uint8_t trampoline_gdt_ptr[];
|
||||
extern uint8_t trampoline_start64_fixup[];
|
||||
|
||||
extern uint64_t trampline_start16_paddr;
|
||||
extern uint64_t trampoline_start16_paddr;
|
||||
extern int ibrs_type;
|
||||
|
||||
/*
|
||||
@ -250,7 +250,7 @@ extern struct cpuinfo_x86 boot_cpu_data;
|
||||
|
||||
/* Function prototypes */
|
||||
void cpu_dead(uint32_t logical_id);
|
||||
void trampline_start16(void);
|
||||
void trampoline_start16(void);
|
||||
int hv_main(int cpu_id);
|
||||
bool is_vapic_supported(void);
|
||||
bool is_vapic_intr_delivery_supported(void);
|
||||
|
||||
@ -15,7 +15,7 @@ typedef struct {
|
||||
struct efi_ctx {
|
||||
uint64_t rip;
|
||||
void *rsdp;
|
||||
void *ap_trampline_buf;
|
||||
void *ap_trampoline_buf;
|
||||
dt_addr_t gdt;
|
||||
dt_addr_t idt;
|
||||
uint16_t tr_sel;
|
||||
@ -51,6 +51,6 @@ struct efi_ctx {
|
||||
}__attribute__((packed));
|
||||
|
||||
void *get_rsdp_from_uefi(void);
|
||||
void *get_ap_trampline_buf(void);
|
||||
void *get_ap_trampoline_buf(void);
|
||||
|
||||
#endif /* UEFI_H*/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user