diff --git a/hypervisor/arch/x86/configs/apl-mrb/board.c b/hypervisor/arch/x86/configs/apl-mrb/board.c index 830a75dcc..20e1314d4 100644 --- a/hypervisor/arch/x86/configs/apl-mrb/board.c +++ b/hypervisor/arch/x86/configs/apl-mrb/board.c @@ -8,3 +8,4 @@ struct platform_clos_info platform_clos_array[0]; uint16_t platform_clos_num = 0; +const struct cpu_state_table board_cpu_state_tbl; diff --git a/hypervisor/arch/x86/configs/apl-up2/board.c b/hypervisor/arch/x86/configs/apl-up2/board.c index 7102ca4d7..a7f9dc36c 100644 --- a/hypervisor/arch/x86/configs/apl-up2/board.c +++ b/hypervisor/arch/x86/configs/apl-up2/board.c @@ -27,3 +27,5 @@ struct platform_clos_info platform_clos_array[4] = { }; uint16_t platform_clos_num = (uint16_t)(sizeof(platform_clos_array)/sizeof(struct platform_clos_info)); + +const struct cpu_state_table board_cpu_state_tbl; diff --git a/hypervisor/arch/x86/configs/dnv-cb2/board.c b/hypervisor/arch/x86/configs/dnv-cb2/board.c index 830a75dcc..20e1314d4 100644 --- a/hypervisor/arch/x86/configs/dnv-cb2/board.c +++ b/hypervisor/arch/x86/configs/dnv-cb2/board.c @@ -8,3 +8,4 @@ struct platform_clos_info platform_clos_array[0]; uint16_t platform_clos_num = 0; +const struct cpu_state_table board_cpu_state_tbl; diff --git a/hypervisor/arch/x86/configs/generic/board.c b/hypervisor/arch/x86/configs/generic/board.c index 830a75dcc..20e1314d4 100644 --- a/hypervisor/arch/x86/configs/generic/board.c +++ b/hypervisor/arch/x86/configs/generic/board.c @@ -8,3 +8,4 @@ struct platform_clos_info platform_clos_array[0]; uint16_t platform_clos_num = 0; +const struct cpu_state_table board_cpu_state_tbl; diff --git a/hypervisor/arch/x86/configs/nuc6cayh/board.c b/hypervisor/arch/x86/configs/nuc6cayh/board.c index 830a75dcc..20e1314d4 100644 --- a/hypervisor/arch/x86/configs/nuc6cayh/board.c +++ b/hypervisor/arch/x86/configs/nuc6cayh/board.c @@ -8,3 +8,4 @@ struct platform_clos_info platform_clos_array[0]; uint16_t platform_clos_num = 0; +const struct cpu_state_table board_cpu_state_tbl; diff --git a/hypervisor/arch/x86/configs/nuc7i7dnb/board.c b/hypervisor/arch/x86/configs/nuc7i7dnb/board.c index 830a75dcc..20e1314d4 100644 --- a/hypervisor/arch/x86/configs/nuc7i7dnb/board.c +++ b/hypervisor/arch/x86/configs/nuc7i7dnb/board.c @@ -8,3 +8,4 @@ struct platform_clos_info platform_clos_array[0]; uint16_t platform_clos_num = 0; +const struct cpu_state_table board_cpu_state_tbl; diff --git a/hypervisor/arch/x86/cpu_state_tbl.c b/hypervisor/arch/x86/cpu_state_tbl.c index a44e39ec6..a8eef09ae 100644 --- a/hypervisor/arch/x86/cpu_state_tbl.c +++ b/hypervisor/arch/x86/cpu_state_tbl.c @@ -9,6 +9,7 @@ #include #include #include +#include /* The table includes cpu px info of Intel A3960 SoC */ static const struct cpu_px_data px_a3960[17] = { @@ -104,10 +105,7 @@ static const struct cpu_cx_data cx_i78650[3] = { {{SPACE_SYSTEM_IO, 0x8U, 0U, 0U, 0x1819UL}, 0x3U, 0x40AU, 0UL} /* C3 */ }; -static const struct cpu_state_table { - char model_name[64]; - struct cpu_state_info state_info; -} cpu_state_tbl[5] = { +static const struct cpu_state_table cpu_state_tbl[5] = { {"Intel(R) Atom(TM) Processor A3960 @ 1.90GHz", {(uint8_t)ARRAY_SIZE(px_a3960), px_a3960, (uint8_t)ARRAY_SIZE(cx_bxt), cx_bxt} @@ -155,10 +153,33 @@ struct cpu_state_info *get_cpu_pm_state_info(void) return &cpu_pm_state_info; } +static void load_cpu_state_info(const struct cpu_state_info *state_info) +{ + if ((state_info->px_cnt != 0U) && (state_info->px_data != NULL)) { + if (state_info->px_cnt > MAX_PSTATE) { + cpu_pm_state_info.px_cnt = MAX_PSTATE; + } else { + cpu_pm_state_info.px_cnt = state_info->px_cnt; + } + + cpu_pm_state_info.px_data = state_info->px_data; + } + + if ((state_info->cx_cnt != 0U) && (state_info->cx_data != NULL)) { + if (state_info->cx_cnt > MAX_CX_ENTRY) { + cpu_pm_state_info.cx_cnt = MAX_CX_ENTRY; + } else { + cpu_pm_state_info.cx_cnt = state_info->cx_cnt; + } + + cpu_pm_state_info.cx_data = state_info->cx_data; + } +} + void load_pcpu_state_data(void) { int32_t tbl_idx; - const struct cpu_state_info *state_info; + const struct cpu_state_info *state_info = NULL; struct cpuinfo_x86 *cpu_info = get_pcpu_info(); (void)memset(&cpu_pm_state_info, 0U, sizeof(struct cpu_state_info)); @@ -166,28 +187,15 @@ void load_pcpu_state_data(void) tbl_idx = get_state_tbl_idx(cpu_info->model_name); if (tbl_idx >= 0) { - /* The state table is found. */ - + /* The cpu state table is found at global cpu_state_tbl[]. */ state_info = &(cpu_state_tbl + tbl_idx)->state_info; - - if ((state_info->px_cnt != 0U) && (state_info->px_data != NULL)) { - if (state_info->px_cnt > MAX_PSTATE) { - cpu_pm_state_info.px_cnt = MAX_PSTATE; - } else { - cpu_pm_state_info.px_cnt = state_info->px_cnt; - } - - cpu_pm_state_info.px_data = state_info->px_data; - } - - if ((state_info->cx_cnt != 0U) && (state_info->cx_data != NULL)) { - if (state_info->cx_cnt > MAX_CX_ENTRY) { - cpu_pm_state_info.cx_cnt = MAX_CX_ENTRY; - } else { - cpu_pm_state_info.cx_cnt = state_info->cx_cnt; - } - - cpu_pm_state_info.cx_data = state_info->cx_data; + } else { + /* check whether board.c has a valid cpu state table which generated by offline tool */ + if (strcmp((board_cpu_state_tbl.model_name), cpu_info->model_name) == 0) { + state_info = &board_cpu_state_tbl.state_info; } } + if (state_info != NULL) { + load_cpu_state_info(state_info); + } } diff --git a/hypervisor/include/arch/x86/board.h b/hypervisor/include/arch/x86/board.h index ebc87b7fe..25533966b 100644 --- a/hypervisor/include/arch/x86/board.h +++ b/hypervisor/include/arch/x86/board.h @@ -7,6 +7,7 @@ #define BOARD_H #include +#include /* forward declarations */ struct acrn_vm; @@ -18,6 +19,7 @@ struct platform_clos_info { extern struct platform_clos_info platform_clos_array[]; extern uint16_t platform_clos_num; +extern const struct cpu_state_table board_cpu_state_tbl; /* board specific functions */ void create_prelaunched_vm_e820(struct acrn_vm *vm); diff --git a/hypervisor/include/arch/x86/host_pm.h b/hypervisor/include/arch/x86/host_pm.h index c3d0469fc..32fbfac9a 100644 --- a/hypervisor/include/arch/x86/host_pm.h +++ b/hypervisor/include/arch/x86/host_pm.h @@ -19,6 +19,11 @@ struct cpu_state_info { const struct cpu_cx_data *cx_data; }; +struct cpu_state_table { + char model_name[64]; + struct cpu_state_info state_info; +}; + struct pm_s_state_data *get_host_sstate_data(void); void host_enter_s3(struct pm_s_state_data *sstate_data, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val); extern void asm_enter_s3(struct pm_s_state_data *sstate_data, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);