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hv: lapic: export write_lapic_reg32

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Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1 2018-03-27 21:51:14 +08:00 committed by Jack Ren
parent 471082cc6c
commit 57152d0f27
3 changed files with 19 additions and 12 deletions
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12
hypervisor/arch/x86/intr_lapic.c
View File

@ -166,15 +166,19 @@ struct lapic_info {
static struct lapic_info lapic_info; static struct lapic_info lapic_info;
static uint32_t read_lapic_reg32(uint32_t offset) static inline uint32_t read_lapic_reg32(uint32_t offset)
{ {
ASSERT((offset >= 0x020) && (offset <= 0x3FF), ""); if (offset < 0x20 || offset > 0x3ff)
return 0;
return mmio_read_long(lapic_info.xapic.vaddr + offset); return mmio_read_long(lapic_info.xapic.vaddr + offset);
} }
static void write_lapic_reg32(uint32_t offset, uint32_t value) inline void write_lapic_reg32(uint32_t offset, uint32_t value)
{ {
ASSERT((offset >= 0x020) && (offset <= 0x3FF), ""); if (offset < 0x20 || offset > 0x3ff)
return;
mmio_write_long(value, lapic_info.xapic.vaddr + offset); mmio_write_long(value, lapic_info.xapic.vaddr + offset);
} }

18
hypervisor/arch/x86/timer.c
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@ -174,16 +174,17 @@ _search_nearest_timer(struct per_cpu_timers *cpu_timer)
static struct timer* static struct timer*
_search_timer_by_handle(struct per_cpu_timers *cpu_timer, long handle) _search_timer_by_handle(struct per_cpu_timers *cpu_timer, long handle)
{ {
struct timer *timer; struct timer *timer = NULL, *tmp;
struct list_head *pos; struct list_head *pos;
list_for_each(pos, &cpu_timer->timer_list) { list_for_each(pos, &cpu_timer->timer_list) {
timer = list_entry(pos, struct timer, node); tmp = list_entry(pos, struct timer, node);
if (timer->handle == handle) if (tmp->handle == handle) {
goto FOUND; timer = tmp;
break;
} }
timer = NULL; }
FOUND:
return timer; return timer;
} }
@ -296,9 +297,10 @@ static void init_tsc_deadline_timer(void)
uint32_t val; uint32_t val;
val = VECTOR_TIMER; val = VECTOR_TIMER;
val |= 0x40000; /* TSC deadline and unmask */ val |= APIC_LVTT_TM_TSCDLT; /* TSC deadline and unmask */
mmio_write_long(val, LAPIC_BASE + LAPIC_LVT_TIMER_REGISTER); write_lapic_reg32(LAPIC_LVT_TIMER_REGISTER, val);
asm volatile("mfence" : : : "memory"); asm volatile("mfence" : : : "memory");
/* disarm timer */ /* disarm timer */
msr_write(MSR_IA32_TSC_DEADLINE, 0UL); msr_write(MSR_IA32_TSC_DEADLINE, 0UL);
} }

1
hypervisor/include/arch/x86/lapic.h
View File

@ -179,6 +179,7 @@ struct lapic_regs {
uint32_t tdcr; uint32_t tdcr;
}; };
void write_lapic_reg32(uint32_t offset, uint32_t value);
void save_lapic(struct lapic_regs *regs); void save_lapic(struct lapic_regs *regs);
int early_init_lapic(void); int early_init_lapic(void);
int init_lapic(uint32_t cpu_id); int init_lapic(uint32_t cpu_id);