diff --git a/misc/acrn-config/board_config/board_c.py b/misc/acrn-config/board_config/board_c.py index 3ab009f13..360f3a3cb 100644 --- a/misc/acrn-config/board_config/board_c.py +++ b/misc/acrn-config/board_config/board_c.py @@ -10,7 +10,8 @@ import board_cfg_lib INCLUDE_HEADER = """ #include #include -#include """ +#include +#include """ MSR_IA32_L2_MASK_BASE = 0x00000D10 @@ -155,6 +156,26 @@ def gen_px_cx(config): print("};", file=config) +def gen_pci_hide(config): + """Generate hide pci information for this platform""" + if board_cfg_lib.BOARD_NAME in list(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB.keys()) and board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB[board_cfg_lib.BOARD_NAME] != 0: + hidden_pdev_list = board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB[board_cfg_lib.BOARD_NAME] + hidden_pdev_num = len(hidden_pdev_list) + print("const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM] = {", file=config) + for hidden_pdev_i in range(hidden_pdev_num): + bus = hex(int(hidden_pdev_list[hidden_pdev_i].split(':')[0], 16)) + dev = hex(int(hidden_pdev_list[hidden_pdev_i].split(':')[1], 16)) + fun = hex(int(hidden_pdev_list[hidden_pdev_i].split(':')[2], 16)) + print("\t{", file=config) + print("\t\t.bits.b = {}U,".format(bus), file=config) + print("\t\t.bits.d = {}U,".format(dev), file=config) + print("\t\t.bits.f = {}U,".format(fun), file=config) + print("\t},", file=config) + print("};", file=config) + else: + print("const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM];", file=config) + + def generate_file(config): """ Start to generate board.c @@ -178,4 +199,7 @@ def generate_file(config): # start to parse PX/CX info gen_px_cx(config) + # gen hide pci info for platform + gen_pci_hide(config) + return err_dic diff --git a/misc/acrn-config/board_config/misc_cfg_h.py b/misc/acrn-config/board_config/misc_cfg_h.py index 496a73132..13960d783 100644 --- a/misc/acrn-config/board_config/misc_cfg_h.py +++ b/misc/acrn-config/board_config/misc_cfg_h.py @@ -12,6 +12,7 @@ MISC_CFG_HEADER = """ MISC_CFG_END = """#endif /* MISC_CFG_H */""" + class Vuart: t_vm_id = {} @@ -157,6 +158,15 @@ def generate_file(config): print("", file=config) if "SOS_VM" in vm_types: sos_bootarg_diff(sos_cmdlines, config) + + # set macro for HIDDEN PTDEVS + print("", file=config) + if board_cfg_lib.BOARD_NAME in list(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB): + print("#define MAX_HIDDEN_PDEVS_NUM {}U".format(len(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB[board_cfg_lib.BOARD_NAME])), file=config) + else: + print("#define MAX_HIDDEN_PDEVS_NUM 0U", file=config) + print("", file=config) + print("{}".format(MISC_CFG_END), file=config) return err_dic diff --git a/misc/acrn-config/library/board_cfg_lib.py b/misc/acrn-config/library/board_cfg_lib.py index c31204001..051110e30 100644 --- a/misc/acrn-config/library/board_cfg_lib.py +++ b/misc/acrn-config/library/board_cfg_lib.py @@ -33,6 +33,11 @@ ERR_LIST = {} HEADER_LICENSE = common.open_license() + "\n" +# The data base contains hide pci device +KNOWN_HIDDEN_PDEVS_BOARD_DB = { + 'apl-up2':['00:0d:0'], +} + def prepare(check_git): """ check environment """