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hv: vpci: rename pci_bar to pci_vbar
Structure pci_vbar is used to define the virtual BAR rather than physical BAR. It's better to name as pci_vbar. Tracked-On: #3475 Signed-off-by: Li Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -40,10 +40,10 @@
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static void vdev_pt_unmap_mem_vbar(struct pci_vdev *vdev, uint32_t idx)
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{
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bool is_msix_table_bar;
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struct pci_bar *vbar;
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struct pci_vbar *vbar;
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struct acrn_vm *vm = vdev->vpci->vm;
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vbar = &vdev->bar[idx];
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vbar = &vdev->vbars[idx];
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if (vbar->base != 0UL) {
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ept_del_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp),
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@ -87,10 +87,10 @@ static void vdev_pt_unmap_mem_vbar(struct pci_vdev *vdev, uint32_t idx)
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static void vdev_pt_map_mem_vbar(struct pci_vdev *vdev, uint32_t idx)
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{
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bool is_msix_table_bar;
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struct pci_bar *vbar;
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struct pci_vbar *vbar;
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struct acrn_vm *vm = vdev->vpci->vm;
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vbar = &vdev->bar[idx];
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vbar = &vdev->vbars[idx];
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if (vbar->base != 0UL) {
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ept_add_mr(vm, (uint64_t *)(vm->arch_vm.nworld_eptp),
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@ -129,7 +129,7 @@ static void vdev_pt_allow_io_vbar(struct pci_vdev *vdev, uint32_t idx)
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{
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/* For SOS, all port IO access is allowed by default, so skip SOS here */
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if (!is_sos_vm(vdev->vpci->vm)) {
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struct pci_bar *vbar = &vdev->bar[idx];
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struct pci_vbar *vbar = &vdev->vbars[idx];
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if (vbar->base != 0UL) {
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allow_guest_pio_access(vdev->vpci->vm, (uint16_t)vbar->base, (uint32_t)(vbar->size));
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}
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@ -146,7 +146,7 @@ static void vdev_pt_deny_io_vbar(struct pci_vdev *vdev, uint32_t idx)
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{
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/* For SOS, all port IO access is allowed by default, so skip SOS here */
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if (!is_sos_vm(vdev->vpci->vm)) {
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struct pci_bar *vbar = &vdev->bar[idx];
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struct pci_vbar *vbar = &vdev->vbars[idx];
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if (vbar->base != 0UL) {
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deny_guest_pio_access(vdev->vpci->vm, (uint16_t)(vbar->base), (uint32_t)(vbar->size));
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}
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@ -161,7 +161,7 @@ void vdev_pt_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
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{
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uint32_t update_idx = idx;
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uint32_t offset = pci_bar_offset(idx);
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struct pci_bar *vbar = &vdev->bar[idx];
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struct pci_vbar *vbar = &vdev->vbars[idx];
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switch (vbar->type) {
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case PCIBAR_IO_SPACE:
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@ -171,7 +171,7 @@ void vdev_pt_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
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vdev_pt_allow_io_vbar(vdev, update_idx);
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} else {
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pci_vdev_write_cfg_u32(vdev, offset, val);
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vdev->bar[update_idx].base = 0UL;
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vdev->vbars[update_idx].base = 0UL;
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}
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break;
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@ -189,7 +189,7 @@ void vdev_pt_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
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vdev_pt_map_mem_vbar(vdev, update_idx);
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} else {
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pci_vdev_write_cfg_u32(vdev, offset, val);
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vdev->bar[update_idx].base = 0UL;
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vdev->vbars[update_idx].base = 0UL;
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}
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break;
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}
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@ -224,7 +224,7 @@ void init_vdev_pt(struct pci_vdev *vdev)
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{
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enum pci_bar_type type;
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uint32_t idx;
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struct pci_bar *vbar;
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struct pci_vbar *vbar;
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uint16_t pci_command;
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uint32_t size32, offset, lo, hi = 0U;
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union pci_bdf pbdf;
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@ -239,7 +239,7 @@ void init_vdev_pt(struct pci_vdev *vdev)
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vdev->af_capoff = vdev->pdev->af_capoff;
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for (idx = 0U; idx < vdev->nr_bars; idx++) {
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vbar = &vdev->bar[idx];
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vbar = &vdev->vbars[idx];
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offset = pci_bar_offset(idx);
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lo = pci_pdev_read_cfg(pbdf, offset, 4U);
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@ -280,7 +280,7 @@ void init_vdev_pt(struct pci_vdev *vdev)
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vbar->size = vbar->size & ~(vbar->size - 1UL);
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vbar->size = round_page_up(vbar->size);
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vbar = &vdev->bar[idx];
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vbar = &vdev->vbars[idx];
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vbar->mask = size32;
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vbar->type = PCIBAR_MEM64HI;
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@ -102,20 +102,20 @@ uint32_t pci_vdev_read_bar(const struct pci_vdev *vdev, uint32_t idx)
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bar = pci_vdev_read_cfg_u32(vdev, offset);
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/* Sizing BAR */
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if (bar == ~0U) {
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bar = vdev->bar[idx].mask;
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bar = vdev->vbars[idx].mask;
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}
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return bar;
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}
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static void pci_vdev_update_bar_base(struct pci_vdev *vdev, uint32_t idx)
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{
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struct pci_bar *vbar;
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struct pci_vbar *vbar;
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enum pci_bar_type type;
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uint64_t base = 0UL;
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uint32_t lo, hi, offset;
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struct acrn_vm *vm = vdev->vpci->vm;
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vbar = &vdev->bar[idx];
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vbar = &vdev->vbars[idx];
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offset = pci_bar_offset(idx);
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lo = pci_vdev_read_cfg_u32(vdev, offset);
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if ((vbar->type != PCIBAR_NONE) && (lo != ~0U)) {
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@ -123,7 +123,7 @@ static void pci_vdev_update_bar_base(struct pci_vdev *vdev, uint32_t idx)
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base = lo & vbar->mask;
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if (vbar->type == PCIBAR_MEM64) {
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vbar = &vdev->bar[idx + 1U];
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vbar = &vdev->vbars[idx + 1U];
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hi = pci_vdev_read_cfg_u32(vdev, offset + 4U);
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if (hi != ~0U) {
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hi &= vbar->mask;
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@ -137,23 +137,23 @@ static void pci_vdev_update_bar_base(struct pci_vdev *vdev, uint32_t idx)
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}
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}
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if ((base != 0UL) && !ept_is_mr_valid(vm, base, vdev->bar[idx].size)) {
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if ((base != 0UL) && !ept_is_mr_valid(vm, base, vdev->vbars[idx].size)) {
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pr_fatal("%s, %x:%x.%x set invalid bar[%d] base: 0x%lx, size: 0x%lx\n", __func__,
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vdev->bdf.bits.b, vdev->bdf.bits.d, vdev->bdf.bits.f, idx, base, vdev->bar[idx].size);
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vdev->bdf.bits.b, vdev->bdf.bits.d, vdev->bdf.bits.f, idx, base, vdev->vbars[idx].size);
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/* If guest set a invalid GPA, ignore it temporarily */
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base = 0UL;
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}
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vdev->bar[idx].base = base;
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vdev->vbars[idx].base = base;
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}
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void pci_vdev_write_bar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
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{
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struct pci_bar *vbar;
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struct pci_vbar *vbar;
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uint32_t bar, offset;
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uint32_t update_idx = idx;
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vbar = &vdev->bar[idx];
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vbar = &vdev->vbars[idx];
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bar = val & vbar->mask;
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bar |= vbar->fixed;
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offset = pci_bar_offset(idx);
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@ -34,7 +34,7 @@
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#include <pci.h>
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struct pci_bar {
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struct pci_vbar {
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enum pci_bar_type type;
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uint64_t size; /* BAR size */
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uint64_t base; /* BAR guest physical address */
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@ -94,7 +94,7 @@ struct pci_vdev {
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/* The bar info of the virtual PCI device. */
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uint32_t nr_bars; /* 6 for normal device, 2 for bridge, 1 for cardbus */
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struct pci_bar bar[PCI_BAR_COUNT];
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struct pci_vbar vbars[PCI_BAR_COUNT];
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struct pci_msi msi;
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struct pci_msix msix;
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