From 58dcb0af1bd1ab95bd0408452b7fdf794af2392b Mon Sep 17 00:00:00 2001 From: Zhao Yakui Date: Wed, 26 Jun 2019 13:37:09 +0800 Subject: [PATCH] Revert "Refine the BSP/AP boot flowchart to match BIOS boot flow" This reverts commit ff9d667b498410e11fb2516ed3324c5ee17d7618. --- hypervisor/arch/x86/cpu.c | 11 +---------- hypervisor/arch/x86/guest/vlapic.c | 10 ---------- 2 files changed, 1 insertion(+), 20 deletions(-) diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c index 20bda6ecd..ee9f70e53 100644 --- a/hypervisor/arch/x86/cpu.c +++ b/hypervisor/arch/x86/cpu.c @@ -232,12 +232,11 @@ void init_pcpu_post(uint16_t pcpu_id) ptdev_init(); /* Start all secondary cores */ -#if 0 startup_paddr = prepare_trampoline(); if (!start_pcpus(AP_MASK)) { panic("Failed to start all secondary cores!"); } -#endif + ASSERT(get_pcpu_id() == BOOT_CPU_ID, ""); } else { pr_dbg("Core %hu is up", pcpu_id); @@ -314,14 +313,6 @@ bool start_pcpus(uint64_t mask) uint16_t pcpu_id = get_pcpu_id(); uint64_t expected_start_mask = mask; - if ((pcpu_active_bitmap & mask) == mask) - return 1; - -#if 1 - if (startup_paddr == 0) - startup_paddr = prepare_trampoline(); -#endif - /* secondary cpu start up will wait for pcpu_sync -> 0UL */ atomic_store64(&pcpu_sync, 1UL); diff --git a/hypervisor/arch/x86/guest/vlapic.c b/hypervisor/arch/x86/guest/vlapic.c index f99f7a7ad..44f74a78a 100644 --- a/hypervisor/arch/x86/guest/vlapic.c +++ b/hypervisor/arch/x86/guest/vlapic.c @@ -1201,7 +1201,6 @@ vlapic_process_init_sipi(struct acrn_vcpu* target_vcpu, uint32_t mode, target_vcpu->arch.nr_sipi = 1U; } } else if (mode == APIC_DELMODE_STARTUP) { - /* Ignore SIPIs in any state other than wait-for-SIPI */ if ((target_vcpu->state == VCPU_INIT) && (target_vcpu->arch.nr_sipi != 0U)) { @@ -1260,11 +1259,6 @@ static void vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic) } else if (((shorthand == APIC_DEST_SELF) || (shorthand == APIC_DEST_ALLISELF)) && ((mode == APIC_DELMODE_NMI) || (mode == APIC_DELMODE_INIT) || (mode == APIC_DELMODE_STARTUP))) { - -#if 1 - /* Start all secondary cores */ - start_pcpus(AP_MASK); -#endif dev_dbg(ACRN_DBG_LAPIC, "Invalid ICR value"); } else { @@ -1274,10 +1268,6 @@ static void vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic) switch (shorthand) { case APIC_DEST_DESTFLD: -#if 1 - /* Start all secondary cores */ - start_pcpus(AP_MASK); -#endif vlapic_calc_dest(vlapic->vm, &dmask, is_broadcast, dest, phys, false); break; case APIC_DEST_SELF: