acrn-config: expose GPIO chassis interrupt to safety VM as INTx

This patch is to expose GPIO chassis interrupts as INTx to safety VM for
EHL. User can configure this per-VM attribute in scenario xml using the
following format:
<pt_intx desc="pt intx mapping.">
  	(phys_gsi0, virt_gsi0), (phys_gsi1, virt_gsi1), (phys_gsiN, virt_gsiN)
 </pt_intx>

The physical and virtual interrupt gsi in each pair are separated by a
comma and enclosed in parentheses. If an integer begins with 0x or 0X,
it is hexadecimal, otherwise, it is assumed to be decimal. Example:
  <pt_intx desc="pt intx mapping.">
  	(1, 0), (0x3, 1), (0x4, 2), (5, 6), (89, 0x12)
  </pt_intx>

Tracked-On: #5241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>

misc/acrn-config/board_config/board_info_h.py

@@ -97,4 +97,9 @@ def generate_file(config):
         print("", file=config)
         print("#define P2SB_BAR_ADDR\t\t\t0x{:X}UL".format(board_cfg_lib.find_p2sb_bar_addr()), file=config)
 
+    if board_cfg_lib.is_matched_board(("ehl-crb-b")):
+        print("", file=config)
+        print("#define BASE_GPIO_PORT_ID\t\t0x69U", file=config)
+        print("#define MAX_GPIO_COMMUNITIES\t0x6U", file=config)
+
     print(BOARD_INFO_ENDIF, file=config)

misc/acrn-config/library/common.py

@@ -10,6 +10,7 @@ import shutil
 import subprocess
 import xml.etree.ElementTree as ET
 
+
 ACRN_CONFIG_TARGET = ''
 SOURCE_ROOT_DIR = os.path.join(os.path.dirname(os.path.abspath(__file__)), '../../../')
 HV_LICENSE_FILE = SOURCE_ROOT_DIR + 'misc/acrn-config/library/hypervisor_license'
@@ -548,3 +549,14 @@ def get_leaf_tag_map_bool(config_file, branch_tag, tag_str=''):
 
 def hpa2gpa(vm_id, hpa, size):
     return hpa
+
+
+def str2int(x):
+    s = x.replace(" ", "").lower()
+
+    if s:
+        base = 10
+        if s.startswith('0x'): base = 16
+        return int(s, base)
+
+    return 0

misc/acrn-config/library/scenario_cfg_lib.py

@@ -819,3 +819,42 @@ def check_p2sb(enable_p2sb):
         if p2sb and board_cfg_lib.is_tpm_passthru():
             ERR_LIST["vm:id=0,p2sb"] = "Cannot enable p2sb and tpm passthru at the same time"
             return
+
+
+def check_pt_intx(phys_gsi, virt_gsi):
+
+    if not phys_gsi and not virt_gsi:
+        return
+
+    if not board_cfg_lib.is_matched_board(('ehl-crb-b')):
+        ERR_LIST["pt_intx"] = "only board ehl-crb-b is supported"
+        return
+
+    if not VM_DB[common.VM_TYPES[0]]['load_type'] == "PRE_LAUNCHED_VM":
+       ERR_LIST["pt_intx"] = "pt_intx can only be specified for pre-launched VM"
+       return
+
+    for (id1,p), (id2,v) in zip(phys_gsi.items(), virt_gsi.items()):
+        if id1 != 0 or id2 != 0:
+            ERR_LIST["pt_intx"] = "virt_gsi and phys_gsi can only be specified for VM0"
+            return
+
+        if len(p) != len(v):
+            ERR_LIST["vm:id=0,pt_intx"] = "virt_gsi and phys_gsi must have same length"
+            return
+
+        if len(p) != len(set(p)):
+            ERR_LIST["vm:id=0,pt_intx"] = "phys_gsi contains duplicates"
+            return
+
+        if len(v) != len(set(v)):
+            ERR_LIST["vm:id=0,pt_intx"] = "virt_gsi contains duplicates"
+            return
+
+        if len(p) > 120:
+            ERR_LIST["vm:id=0,pt_intx"] = "# of phys_gsi and virt_gsi pairs must not be greater than 120"
+            return
+
+        if not all(pin < 120 for pin in v):
+            ERR_LIST["vm:id=0,pt_intx"] = "virt_gsi must be less than 120"
+            return

misc/acrn-config/scenario_config/scenario_item.py

@@ -6,7 +6,7 @@
 import common
 import board_cfg_lib
 import scenario_cfg_lib
-
+import re
 
 class HwInfo:
     """ This is Abstract of class of Hardware information """
@@ -295,6 +295,57 @@ class MmioResourcesInfo:
         scenario_cfg_lib.check_p2sb(self.p2sb)
 
 
+class PtIntxInfo:
+    """ This is Abstract of class of pt intx setting information """
+    phys_gsi = {}
+    virt_gsi = {}
+
+    def __init__(self, scenario_file):
+        self.scenario_info = scenario_file
+
+    def get_info(self):
+        """
+        Get all items which belong to this class
+        :return: None
+        """
+        pt_intx_map = common.get_leaf_tag_map(self.scenario_info, "pt_intx")
+
+        # translation table to normalize the paired phys_gsi and virt_gsi string
+        table = {ord('[') : ord('('), ord(']') : ord(')'), ord('{') : ord('('),
+            ord('}') : ord(')'), ord(';') : ord(','),
+            ord('\n') : None, ord('\r') : None, ord(' ') : None}
+
+        for vm_i, s in pt_intx_map.items():
+            #normalize the phys_gsi and virt_gsi pair string
+            s = s.translate(table)
+
+            #extract the phys_gsi and virt_gsi pairs between parenthesis to a list
+            s = re.findall(r'\(([^)]+)', s)
+
+            self.phys_gsi[vm_i] = [];
+            self.virt_gsi[vm_i] = [];
+
+            for part in s:
+                if not part: continue
+                assert ',' in part, "you need to use ',' to separate phys_gsi and virt_gsi!"
+                a, b = part.split(',')
+                if not a and not b: continue
+                assert a and b, "you need to specify both phys_gsi and virt_gsi!"
+                a, b = common.str2int(a), common.str2int(b)
+
+                self.phys_gsi[vm_i].append(a)
+                self.virt_gsi[vm_i].append(b)
+
+
+    def check_item(self):
+        """
+        Check all items in this class
+        :return: None
+        """
+
+        scenario_cfg_lib.check_pt_intx(self.phys_gsi, self.virt_gsi)
+
+
 class VmInfo:
     """ This is Abstract of class of VM setting """
     name = {}
@@ -316,6 +367,7 @@ class VmInfo:
         self.load_order_cnt = LoadOrderNum()
         self.shmem = ShareMem(self.scenario_info)
         self.mmio_resource_info = MmioResourcesInfo(self.scenario_info)
+        self.pt_intx_info = PtIntxInfo(self.scenario_info)
 
 
     def get_info(self):
@@ -339,6 +391,7 @@ class VmInfo:
         self.cfg_pci.get_info()
         self.load_order_cnt.get_info(self.load_vm)
         self.mmio_resource_info.get_info()
+        self.pt_intx_info.get_info()
 
     def set_ivshmem(self, ivshmem_regions):
         """
@@ -379,4 +432,5 @@ class VmInfo:
         self.vuart.check_item()
         self.shmem.check_items()
         self.mmio_resource_info.check_item()
+        self.pt_intx_info.check_item()
         scenario_cfg_lib.ERR_LIST.update(err_dic)

misc/acrn-config/scenario_config/vm_configurations_c.py

@@ -370,6 +370,12 @@ def gen_pre_launch_vm(vm_type, vm_i, scenario_items, config):
         print("\t\t},", file=config)
         print("#endif", file=config)
 
+    if (vm_i == 0 and board_cfg_lib.is_matched_board(("ehl-crb-b"))
+        and vm_info.pt_intx_info.phys_gsi.get(vm_i) is not None
+        and len(vm_info.pt_intx_info.phys_gsi[vm_i]) > 0):
+        print("\t\t.pt_intx_num = {}U,".format(len(vm_info.pt_intx_info.phys_gsi[vm_i])), file=config)
+        print("\t\t.pt_intx = &vm0_pt_intx[0U],", file=config)
+
     print("\t},", file=config)
 
 
@@ -420,6 +426,20 @@ def generate_file(scenario_items, config):
             pre_launch_definition(vm_info, config)
             break
 
+    if (board_cfg_lib.is_matched_board(("ehl-crb-b"))
+        and vm_info.pt_intx_info.phys_gsi.get(0) is not None
+        and len(vm_info.pt_intx_info.phys_gsi[0]) > 0):
+
+        print("static struct pt_intx_config vm0_pt_intx[{}U] = {{".format(len(vm_info.pt_intx_info.phys_gsi[0])), file=config)
+        for i, (p_pin, v_pin) in enumerate(zip(vm_info.pt_intx_info.phys_gsi[0], vm_info.pt_intx_info.virt_gsi[0])):
+            print("\t[{}U] = {{".format(i), file=config)
+            print("\t\t.phys_gsi = {}U,".format(p_pin), file=config)
+            print("\t\t.virt_gsi = {}U,".format(v_pin), file=config)
+            print("\t},", file=config)
+
+        print("};", file=config)
+        print("", file=config)
+
     print("struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {", file=config)
     for vm_i, vm_type in common.VM_TYPES.items():
 

misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid.xml

@@ -80,6 +80,8 @@
         <mmio_resources desc="MMIO resources.">
             <p2sb>n</p2sb>
         </mmio_resources>
+        <pt_intx desc="pt intx mapping.">
+        </pt_intx>
         <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
             <vcpu_clos>0</vcpu_clos>
         </clos>