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hv: ept: flush cache for modified ept entries
EPT tables are shared by MMU and IOMMU. Some IOMMUs don't support page-walk coherency, the cpu cache of EPT entires should be flushed to memory after modifications, so that the modifications are visible to the IOMMUs. This patch adds a new interface to flush the cache of modified EPT entires. There are different implementations for EPT/PPT entries: - For PPT, there is no need to flush the cpu cache after update. - For EPT, need to call iommu_flush_cache to make the modifications visible to IOMMUs. Tracked-On: #3607 Signed-off-by: Binbin Wu <binbin.wu@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com>
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ACRN System Integration
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2abd8b34ef
commit
5c81659713
@@ -71,6 +71,7 @@ struct memory_ops {
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struct page *(*get_pd_page)(const union pgtable_pages_info *info, uint64_t gpa);
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struct page *(*get_pt_page)(const union pgtable_pages_info *info, uint64_t gpa);
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void *(*get_sworld_memory_base)(const union pgtable_pages_info *info);
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void (*clflush_pagewalk)(const void *p);
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};
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extern const struct memory_ops ppt_mem_ops;
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@@ -257,9 +257,10 @@ static inline uint64_t get_pgentry(const uint64_t *pte)
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/*
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* pgentry may means pml4e/pdpte/pde/pte
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*/
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static inline void set_pgentry(uint64_t *ptep, uint64_t pte)
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static inline void set_pgentry(uint64_t *ptep, uint64_t pte, const struct memory_ops *mem_ops)
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{
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*ptep = pte;
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mem_ops->clflush_pagewalk(ptep);
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}
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static inline uint64_t pde_large(uint64_t pde)
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