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hv: MSI-X Message Address write fix

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Some PCI devices can not accept DWORD write to the MSI-X Table though
PCI Spec allows it:

PCI Spec 3.0 6.8.3.2 MSI-X Configuration: Specifically, software is
always permitted to fill in the Message Address and Message Upper Address
fields with a single QWORD write.

Tracked-On: #1568
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Zide Chen 2018-10-31 08:59:03 -07:00 committed by Xie, Nanlin
parent dbe156e9f6
commit 5cbe079e24
1 changed files with 10 additions and 1 deletions
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11
hypervisor/dm/vpci/msix.c
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@ -48,6 +48,7 @@ static int vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
{
struct msix_table_entry *pentry;
struct ptdev_msi_info info;
volatile uint32_t *ptr32;
uint64_t hva;
int ret;
@ -63,7 +64,15 @@ static int vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
/* Write the table entry to the physical structure */
hva = vdev->msix.mmio_hva + vdev->msix.table_offset;
pentry = (struct msix_table_entry *)hva + index;
pentry->addr = info.pmsi_addr;
/*
* PCI 3.0 Spec allows writing to Message Address and Message Upper Address
* fields with a single QWORD write, but some hardware can accept 32 bits
* write only
*/
ptr32 = (uint32_t *)&pentry->addr;
ptr32[0] = (uint32_t)info.pmsi_addr;
ptr32[1] = (info.pmsi_addr >> 32U);
pentry->data = info.pmsi_data;
pentry->vector_control = vdev->msix.tables[index].vector_control;