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hv:Rename ptdev to ptirq for some APIs

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-- Rename the fowllowing APIs:
  ptdev_intx_pin_remap --> ptirq_intx_pin_remap
  ptdev_msix_remap  --> ptirq_msix_remap
  ptdev_add_intx_remapping --> ptirq_add_intx_remapping
  ptdev_remove_intx_remapping --> ptirq_remove_intx_remapping
  ptdev_add_msix_remapping --> ptirq_add_msix_remapping
  ptdev_remove_msix_remapping --> ptirq_remove_msix_remapping
  ptdev_intx_ack  --> ptirq_intx_ack
  ptdev_lookup_entry_by_sid --> ptirq_lookup_entry_by_sid
  ptdev_lookup_entry_by_vpin --> ptirq_lookup_entry_by_vpin
  ptdev_build_physical_msi --> ptirq_build_physical_msi
  ptdev_build_physical_rte --> ptirq_build_physical_rte
  alloc_entry   --> ptirq_alloc_entry
  release_entry --> ptirq_release_one_entry
  ptdev_activate_entry --> ptirq_activate_entry
  ptdev_deactivate_entry --> ptirq_deactivate_entry
  ptdev_intr_handle_irq --> ptirq_handle_intx
  ptdev_softirq --> ptirq_softirq
  ptdev_enqueue_softirq --> ptirq_enqueue_softirq
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  get_vm_ptdev_intr_data --> ptirq_get_intr_data
  alloc_ptdev_entry_id --> ptirq_alloc_entry_id
  ptdev_intr_delay_callback --> ptirq_intr_delay_callback
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  ptdev_interrupt_handler --> ptirq_interrupt_handler

-- Merge 'ptdev_release_all_entries' and 'release_all_entries'
   to 'ptirq_release_all_entries'

v2-->v3:
   Rename ptirq_release_one_entry to ptirq_release_entry
v1-->v2:
   still use ptdev_init instead of ptirq_init

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Mingqiang Chi
2018-11-29 16:42:45 +08:00
committed by Xie, Nanlin
parent 5b43aa8a65
commit 5dcfc1336b
10 changed files with 111 additions and 121 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
hypervisor/dm/vioapic.c
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@@ -400,7 +400,7 @@ vioapic_indirect_write(struct acrn_vioapic *vioapic, uint32_t addr,
((last.full & IOAPIC_RTE_INTMASK) == 0UL)) {
/* VM enable intr */
/* NOTE: only support max 256 pin */
(void)ptdev_intx_pin_remap(vioapic->vm,
(void)ptirq_intx_pin_remap(vioapic->vm,
(uint8_t)pin, PTDEV_VPIN_IOAPIC);
}
}
@@ -468,7 +468,7 @@ vioapic_process_eoi(struct acrn_vm *vm, uint32_t vector)
continue;
}
ptdev_intx_ack(vm, (uint8_t)pin, PTDEV_VPIN_IOAPIC);
ptirq_intx_ack(vm, (uint8_t)pin, PTDEV_VPIN_IOAPIC);
}
/*