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mmu: add ept execution only capability check

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check IA32_VMX_EPT_VPID_CAP MSR to see if ept execution only capability
is supported or not

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
This commit is contained in:
Jason Chen CJ 2018-04-11 13:13:15 +08:00 committed by Jack Ren
parent b7d57a946b
commit 60425f91b4
2 changed files with 10 additions and 1 deletions
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8
hypervisor/arch/x86/mmu.c
View File

@ -45,6 +45,7 @@ enum mem_map_request_type {
};
struct mm_capability {
bool ept_x_only_supported;
/* EPT and MMU 1-GByte page supported flag */
bool ept_1gb_page_supported;
bool invept_supported;
@ -96,6 +97,8 @@ static void check_mmu_capability(void)
/* Read the MSR register of EPT and VPID Capability - SDM A.10 */
val = msr_read(MSR_IA32_VMX_EPT_VPID_CAP);
mm_caps.ept_x_only_supported = (val & MSR_VMX_EPT_X_ONLY)
? (true) : (false);
mm_caps.ept_1gb_page_supported = (val & MSR_VMX_EPT_VPID_CAP_1GB)
? (true) : (false);
mm_caps.invept_supported =
@ -123,6 +126,11 @@ static void check_mmu_capability(void)
panic("invept must be supported");
}
static inline bool check_ept_x_only_support(void)
{
return mm_caps.ept_x_only_supported;
}
static inline bool check_invept_single_support(void)
{
return mm_caps.invept_supported &&

1
hypervisor/include/arch/x86/msr.h
View File

@ -516,6 +516,7 @@
#define MSR_LNC_BIOS_CACHE_AS_RAM 0x000002E0 /* Configure CAR */
/* MSR_IA32_VMX_EPT_VPID_CAP: EPT and VPID capability bits */
#define MSR_VMX_EPT_X_ONLY (1UL << 0)/* Execute Only */
#define MSR_VMX_EPT_VPID_CAP_1GB (1UL << 17)/* EPT 1GB page */
#define MSR_VMX_INVEPT (1UL << 20)/* INVEPT */
#define MSR_VMX_INVEPT_SINGLE_CONTEXT (1UL << 25)/* INVEPT Single */