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hv: fix integer violations

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The operands to shift operations (<<, >>) shall be unsigned integers.

v1 -> v2:
 * replace 12U with CPU_PAGE_SHIFT when it is address shift case.
 * replace 6UL with 0x6UL

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao
2018-10-31 10:43:12 +08:00
committed by lijinxia
parent 4d01e60eda
commit 60d0a75243
12 changed files with 54 additions and 54 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
hypervisor/arch/x86/vtd.c
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@@ -71,12 +71,12 @@ dmar_set_bitslice(uint64_t var, uint64_t mask,
#define DMAR_MSI_DELIVERY_LOWPRI (1U << DMAR_MSI_DELIVERY_MODE_SHIFT)
/* Fault event MSI address register */
#define DMAR_MSI_DEST_MODE_SHIFT (2)
#define DMAR_MSI_DEST_MODE_PHYS (0 << DMAR_MSI_DEST_MODE_SHIFT)
#define DMAR_MSI_DEST_MODE_LOGIC (1 << DMAR_MSI_DEST_MODE_SHIFT)
#define DMAR_MSI_REDIRECTION_SHIFT (3)
#define DMAR_MSI_REDIRECTION_CPU (0 << DMAR_MSI_REDIRECTION_SHIFT)
#define DMAR_MSI_REDIRECTION_LOWPRI (1 << DMAR_MSI_REDIRECTION_SHIFT)
#define DMAR_MSI_DEST_MODE_SHIFT (2U)
#define DMAR_MSI_DEST_MODE_PHYS (0U << DMAR_MSI_DEST_MODE_SHIFT)
#define DMAR_MSI_DEST_MODE_LOGIC (1U << DMAR_MSI_DEST_MODE_SHIFT)
#define DMAR_MSI_REDIRECTION_SHIFT (3U)
#define DMAR_MSI_REDIRECTION_CPU (0U << DMAR_MSI_REDIRECTION_SHIFT)
#define DMAR_MSI_REDIRECTION_LOWPRI (1U << DMAR_MSI_REDIRECTION_SHIFT)
enum dmar_cirg_type {
DMAR_CIRG_RESERVED = 0,
@@ -748,8 +748,8 @@ static void fault_record_analysis(__unused uint64_t low, uint64_t high)
pr_info("%s, Reason: 0x%x, SID: %x.%x.%x @0x%llx",
(dma_frcd_up_t(high) != 0U) ? "Read/Atomic" : "Write",
dma_frcd_up_fr(high),
dma_frcd_up_sid(high) >> 8,
(dma_frcd_up_sid(high) >> 3) & 0x1fUL,
dma_frcd_up_sid(high) >> 8U,
(dma_frcd_up_sid(high) >> 3U) & 0x1fUL,
dma_frcd_up_sid(high) & 0x7UL,
low);
#if DBG_IOMMU
@@ -930,13 +930,13 @@ static int add_iommu_device(const struct iommu_domain *domain, uint16_t segment,
dmar_uint = device_to_dmaru(segment, bus, devfun);
if (dmar_uint == NULL) {
pr_err("no dmar unit found for device:0x%x:%x.%x",
bus, devfun >> 3, devfun & 0x7U);
bus, devfun >> 3U, devfun & 0x7U);
return 1;
}
if (dmar_uint->drhd->ignore) {
dev_dbg(ACRN_DBG_IOMMU, "device is ignored :0x%x:%x.%x",
bus, devfun >> 3, devfun & 0x7U);
bus, devfun >> 3U, devfun & 0x7U);
return 0;
}
@@ -992,7 +992,7 @@ static int add_iommu_device(const struct iommu_domain *domain, uint16_t segment,
pr_err("%s: context entry@0x%llx (Lower:%x) ",
__func__, context_entry, context_entry->lower);
pr_err("already present for %x:%x.%x",
bus, devfun >> 3, devfun & 0x7U);
bus, devfun >> 3U, devfun & 0x7U);
return 1;
}