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HV:treewide:Add exec_vmread32 and exec_vmwrite32 functions

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In the hypervisor, VMCS fields include 16-bit fields,
32-bit fields, 64-bit fields and natural-width fields.
In the current implement, no exec_vmread32/exec_vmwrite32
is for accessing 32-bit fields. So there are many type
casting for the return value and parameters vmread/vmwrite
operations.

Create exec_vmread32 and exec_vmwrite32 functions to
access 32-bit fields in VMCS;
Update related variables type for vmread/vmwrite operations;
Update related caller according to VMCS fields size.

V1--V2:
        This is new part of this patch serial to only
        update 32 bit vmread/vmread opertions and related
        caller.
V2-->V3:
	Update related variables type in data structure
	 for exec_vmread32/exec_vmwrite32.
	Rename temp variable 'low' into 'value' for
	exec_vmread32;
V3-->V4:
	Remove useless type conversion.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Xiangyang Wu
2018-07-16 15:43:25 +08:00
committed by lijinxia
parent 65437960a9
commit 612cdceaca
9 changed files with 113 additions and 97 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
hypervisor/arch/x86/guest/instr_emul_wrapper.c
View File

@@ -110,8 +110,8 @@ int vm_set_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
}
exec_vmwrite(base, ret_desc->base);
exec_vmwrite(limit, ret_desc->limit);
exec_vmwrite(access, ret_desc->access);
exec_vmwrite32(limit, ret_desc->limit);
exec_vmwrite32(access, ret_desc->access);
return 0;
}
@@ -136,8 +136,8 @@ int vm_get_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
}
desc->base = exec_vmread(base);
desc->limit = (uint32_t)exec_vmread(limit);
desc->access = (uint32_t)exec_vmread(access);
desc->limit = exec_vmread32(limit);
desc->access = exec_vmread32(access);
return 0;
}
@@ -351,7 +351,7 @@ int decode_instruction(struct vcpu *vcpu)
return retval;
}
csar = (uint32_t)exec_vmread(VMX_GUEST_CS_ATTR);
csar = exec_vmread32(VMX_GUEST_CS_ATTR);
get_guest_paging_info(vcpu, emul_ctxt, csar);
cpu_mode = get_vcpu_mode(vcpu);

8
hypervisor/arch/x86/guest/vcpu.c
View File

@@ -205,24 +205,24 @@ int start_vcpu(struct vcpu *vcpu)
/* Save guest IA32_EFER register */
cur_context->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
set_vcpu_mode(vcpu, exec_vmread(VMX_GUEST_CS_ATTR));
set_vcpu_mode(vcpu, exec_vmread32(VMX_GUEST_CS_ATTR));
/* Obtain current VCPU instruction pointer and length */
cur_context->rip = exec_vmread(VMX_GUEST_RIP);
vcpu->arch_vcpu.inst_len = exec_vmread(VMX_EXIT_INSTR_LEN);
vcpu->arch_vcpu.inst_len = exec_vmread32(VMX_EXIT_INSTR_LEN);
cur_context->rsp = exec_vmread(VMX_GUEST_RSP);
cur_context->rflags = exec_vmread(VMX_GUEST_RFLAGS);
/* Obtain VM exit reason */
vcpu->arch_vcpu.exit_reason = exec_vmread(VMX_EXIT_REASON);
vcpu->arch_vcpu.exit_reason = exec_vmread32(VMX_EXIT_REASON);
if (status != 0) {
/* refer to 64-ia32 spec section 24.9.1 volume#3 */
if (vcpu->arch_vcpu.exit_reason & VMX_VMENTRY_FAIL)
pr_fatal("vmentry fail reason=%lx", vcpu->arch_vcpu.exit_reason);
else
pr_fatal("vmexit fail err_inst=%lx", exec_vmread(VMX_INSTR_ERROR));
pr_fatal("vmexit fail err_inst=%x", exec_vmread32(VMX_INSTR_ERROR));
ASSERT(status == 0, "vm fail");
}

4
hypervisor/arch/x86/guest/vmsr.c
View File

@@ -198,7 +198,7 @@ int rdmsr_vmexit_handler(struct vcpu *vcpu)
/* following MSR not emulated now just left for future */
case MSR_IA32_SYSENTER_CS:
{
v = exec_vmread(VMX_GUEST_IA32_SYSENTER_CS);
v = (uint64_t)exec_vmread32(VMX_GUEST_IA32_SYSENTER_CS);
break;
}
case MSR_IA32_SYSENTER_ESP:
@@ -331,7 +331,7 @@ int wrmsr_vmexit_handler(struct vcpu *vcpu)
/* following MSR not emulated now just left for future */
case MSR_IA32_SYSENTER_CS:
{
exec_vmwrite(VMX_GUEST_IA32_SYSENTER_CS, v);
exec_vmwrite32(VMX_GUEST_IA32_SYSENTER_CS, (uint32_t)v);
break;
}
case MSR_IA32_SYSENTER_ESP: