github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2026-01-04 15:14:27 +00:00
Code Issues Projects Releases Wiki Activity

HV:treewide:Add exec_vmread32 and exec_vmwrite32 functions

Browse Source 
In the hypervisor, VMCS fields include 16-bit fields,
32-bit fields, 64-bit fields and natural-width fields.
In the current implement, no exec_vmread32/exec_vmwrite32
is for accessing 32-bit fields. So there are many type
casting for the return value and parameters vmread/vmwrite
operations.

Create exec_vmread32 and exec_vmwrite32 functions to
access 32-bit fields in VMCS;
Update related variables type for vmread/vmwrite operations;
Update related caller according to VMCS fields size.

V1--V2:
        This is new part of this patch serial to only
        update 32 bit vmread/vmread opertions and related
        caller.
V2-->V3:
	Update related variables type in data structure
	 for exec_vmread32/exec_vmwrite32.
	Rename temp variable 'low' into 'value' for
	exec_vmread32;
V3-->V4:
	Remove useless type conversion.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Xiangyang Wu
2018-07-16 15:43:25 +08:00
committed by lijinxia
parent 65437960a9
commit 612cdceaca
9 changed files with 113 additions and 97 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
hypervisor/arch/x86/trusty.c
View File

@@ -38,16 +38,16 @@ static struct key_info g_key_info = {
{ \
seg.selector = exec_vmread16(VMX_GUEST_##SEG_NAME##_SEL); \
seg.base = exec_vmread(VMX_GUEST_##SEG_NAME##_BASE); \
seg.limit = exec_vmread(VMX_GUEST_##SEG_NAME##_LIMIT); \
seg.attr = exec_vmread(VMX_GUEST_##SEG_NAME##_ATTR); \
seg.limit = exec_vmread32(VMX_GUEST_##SEG_NAME##_LIMIT); \
seg.attr = exec_vmread32(VMX_GUEST_##SEG_NAME##_ATTR); \
}
#define load_segment(seg, SEG_NAME) \
{ \
exec_vmwrite16(VMX_GUEST_##SEG_NAME##_SEL, seg.selector); \
exec_vmwrite(VMX_GUEST_##SEG_NAME##_BASE, seg.base); \
exec_vmwrite(VMX_GUEST_##SEG_NAME##_LIMIT, seg.limit); \
exec_vmwrite(VMX_GUEST_##SEG_NAME##_ATTR, seg.attr); \
exec_vmwrite32(VMX_GUEST_##SEG_NAME##_LIMIT, seg.limit); \
exec_vmwrite32(VMX_GUEST_##SEG_NAME##_ATTR, seg.attr); \
}
#ifndef WORKAROUND_FOR_TRUSTY_4G_MEM
@@ -234,9 +234,9 @@ static void save_world_ctx(struct run_context *context)
*/
context->vmx_ia32_pat = exec_vmread(VMX_GUEST_IA32_PAT_FULL);
context->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
context->ia32_sysenter_cs = exec_vmread(VMX_GUEST_IA32_SYSENTER_CS);
context->ia32_sysenter_esp = exec_vmread(VMX_GUEST_IA32_SYSENTER_ESP);
context->ia32_sysenter_eip = exec_vmread(VMX_GUEST_IA32_SYSENTER_EIP);
context->ia32_sysenter_cs = exec_vmread32(VMX_GUEST_IA32_SYSENTER_CS);
save_segment(context->cs, CS);
save_segment(context->ss, SS);
save_segment(context->ds, DS);
@@ -247,9 +247,9 @@ static void save_world_ctx(struct run_context *context)
save_segment(context->ldtr, LDTR);
/* Only base and limit for IDTR and GDTR */
context->idtr.base = exec_vmread(VMX_GUEST_IDTR_BASE);
context->idtr.limit = exec_vmread(VMX_GUEST_IDTR_LIMIT);
context->gdtr.base = exec_vmread(VMX_GUEST_GDTR_BASE);
context->gdtr.limit = exec_vmread(VMX_GUEST_GDTR_LIMIT);
context->idtr.limit = exec_vmread32(VMX_GUEST_IDTR_LIMIT);
context->gdtr.limit = exec_vmread32(VMX_GUEST_GDTR_LIMIT);
/* MSRs which not in the VMCS */
context->ia32_star = msr_read(MSR_IA32_STAR);
@@ -280,7 +280,7 @@ static void load_world_ctx(struct run_context *context)
exec_vmwrite64(VMX_GUEST_IA32_DEBUGCTL_FULL, context->ia32_debugctl);
exec_vmwrite64(VMX_GUEST_IA32_PAT_FULL, context->vmx_ia32_pat);
exec_vmwrite64(VMX_GUEST_IA32_EFER_FULL, context->ia32_efer);
exec_vmwrite(VMX_GUEST_IA32_SYSENTER_CS, context->ia32_sysenter_cs);
exec_vmwrite32(VMX_GUEST_IA32_SYSENTER_CS, context->ia32_sysenter_cs);
exec_vmwrite(VMX_GUEST_IA32_SYSENTER_ESP, context->ia32_sysenter_esp);
exec_vmwrite(VMX_GUEST_IA32_SYSENTER_EIP, context->ia32_sysenter_eip);
load_segment(context->cs, CS);
@@ -293,9 +293,9 @@ static void load_world_ctx(struct run_context *context)
load_segment(context->ldtr, LDTR);
/* Only base and limit for IDTR and GDTR */
exec_vmwrite(VMX_GUEST_IDTR_BASE, context->idtr.base);
exec_vmwrite(VMX_GUEST_IDTR_LIMIT, context->idtr.limit);
exec_vmwrite(VMX_GUEST_GDTR_BASE, context->gdtr.base);
exec_vmwrite(VMX_GUEST_GDTR_LIMIT, context->gdtr.limit);
exec_vmwrite32(VMX_GUEST_IDTR_LIMIT, context->idtr.limit);
exec_vmwrite32(VMX_GUEST_GDTR_LIMIT, context->gdtr.limit);
/* MSRs which not in the VMCS */
msr_write(MSR_IA32_STAR, context->ia32_star);