diff --git a/hypervisor/arch/x86/configs/apl-mrb.config b/hypervisor/arch/x86/configs/apl-mrb.config deleted file mode 100644 index 8e3957cb5..000000000 --- a/hypervisor/arch/x86/configs/apl-mrb.config +++ /dev/null @@ -1,10 +0,0 @@ -# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) -CONFIG_BOARD="apl-mrb" -CONFIG_SERIAL_PCI=y -CONFIG_HV_RAM_START=0x6e000000 -CONFIG_HV_RAM_SIZE=0x07800000 -CONFIG_PLATFORM_RAM_SIZE=0x200000000 -CONFIG_SOS_RAM_SIZE=0x200000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_IOMMU_BUS_NUM=0x10 -CONFIG_RDT_ENABLED=n diff --git a/hypervisor/arch/x86/configs/apl-mrb/board.c b/hypervisor/arch/x86/configs/apl-mrb/board.c deleted file mode 100644 index 33420543c..000000000 --- a/hypervisor/arch/x86/configs/apl-mrb/board.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - -#ifndef CONFIG_ACPI_PARSE_ENABLED -#error "DMAR info is not available, please set ACPI_PARSE_ENABLED to y in Kconfig. \ - Or use acrn-config tool to generate platform DMAR info." -#endif - -struct dmar_info plat_dmar_info; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM]; -#endif - -const struct cpu_state_table board_cpu_state_tbl; - -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM] = { - { - .bits.b = 0x0U, - .bits.d = 0xdU, - .bits.f = 0x0U, - }, -}; -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h b/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h deleted file mode 100644 index 75500ce4f..000000000 --- a/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define MAX_PCPU_NUM 4U -#define MAX_PLATFORM_CLOS_NUM 0U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U - -#define ROOTFS_0 "root=/dev/sda3 " -#define ROOTFS_1 "root=/dev/mmcblk1p1 " - -#define SOS_ROOTFS ROOTFS_1 -#define SOS_CONSOLE "console=ttyS2 " -#define SOS_COM1_BASE 0x3E8U -#define SOS_COM1_IRQ 6U -#define SOS_COM2_BASE 0x3F8U -#define SOS_COM2_IRQ 10U - -#ifndef CONFIG_RELEASE -#define BOOTARG_DEBUG "hvlog=2M@0xe00000 " \ - "memmap=0x600000$0xa00000 " \ - "ramoops.mem_address=0xa00000 " \ - "ramoops.mem_size=0x400000 " \ - "ramoops.console_size=0x200000 " \ - "reboot_panic=p,w " -#else -#define BOOTARG_DEBUG "" -#endif - -#define SOS_BOOTARGS_DIFF BOOTARG_DEBUG \ - "module_blacklist=dwc3_pci " \ - "i915.enable_initial_modeset=1 " \ - "i915.enable_guc=0x02 " \ - "video=DP-1:d " \ - "video=DP-2:d " \ - "cma=64M@0- " \ - "panic_print=0x1f" - -#define MAX_HIDDEN_PDEVS_NUM 1U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL - -#endif /* MISC_CFG_H */ diff --git a/hypervisor/arch/x86/configs/apl-mrb/pci_devices.h b/hypervisor/arch/x86/configs/apl-mrb/pci_devices.h deleted file mode 100644 index e02e175c4..000000000 --- a/hypervisor/arch/x86/configs/apl-mrb/pci_devices.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define PTDEV_HI_MMIO_SIZE 0UL - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U}, \ - .vbar_base[0] = 0xb3f10000UL, \ - .vbar_base[1] = 0xb3f53000UL, \ - .vbar_base[5] = 0xb3f52000UL - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U}, \ - .vbar_base[0] = 0xb3f00000UL - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[0] = 0xb3c00000UL, \ - .vbar_base[3] = 0xb3c80000UL - -#endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/apl-nuc b/hypervisor/arch/x86/configs/apl-nuc deleted file mode 120000 index 92a6acd0b..000000000 --- a/hypervisor/arch/x86/configs/apl-nuc +++ /dev/null @@ -1 +0,0 @@ -nuc6cayh \ No newline at end of file diff --git a/hypervisor/arch/x86/configs/apl-nuc.config b/hypervisor/arch/x86/configs/apl-nuc.config deleted file mode 120000 index b341a134e..000000000 --- a/hypervisor/arch/x86/configs/apl-nuc.config +++ /dev/null @@ -1 +0,0 @@ -nuc6cayh.config \ No newline at end of file diff --git a/hypervisor/arch/x86/configs/apl-up2.config b/hypervisor/arch/x86/configs/apl-up2.config deleted file mode 100644 index 116e27328..000000000 --- a/hypervisor/arch/x86/configs/apl-up2.config +++ /dev/null @@ -1,6 +0,0 @@ -# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) -CONFIG_BOARD="apl-up2" -CONFIG_SERIAL_PCI=y -CONFIG_SERIAL_PCI_BDF="0:18.0" -CONFIG_HV_RAM_START=0x5e000000 -CONFIG_RDT_ENABLED=y diff --git a/hypervisor/arch/x86/configs/apl-up2/board.c b/hypervisor/arch/x86/configs/apl-up2/board.c deleted file mode 100644 index 53de60791..000000000 --- a/hypervisor/arch/x86/configs/apl-up2/board.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include - -#ifndef CONFIG_ACPI_PARSE_ENABLED -#error "DMAR info is not available, please set ACPI_PARSE_ENABLED to y in Kconfig. \ - Or use acrn-config tool to generate platform DMAR info." -#endif - -struct dmar_info plat_dmar_info; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM] = { - { - .clos_mask = 0xff, - .msr_index = MSR_IA32_L2_MASK_BASE, - }, - { - .clos_mask = 0xff, - .msr_index = MSR_IA32_L2_MASK_BASE + 1U, - }, - { - .clos_mask = 0xff, - .msr_index = MSR_IA32_L2_MASK_BASE + 2U, - }, - { - .clos_mask = 0xff, - .msr_index = MSR_IA32_L2_MASK_BASE + 3U, - }, -}; -struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM]; -#endif - -const struct cpu_state_table board_cpu_state_tbl; - -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM] = { - { - .bits.b = 0x0, - .bits.d = 0xd, - .bits.f = 0x0, - }, -}; -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h b/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h deleted file mode 100644 index a45c8f2e0..000000000 --- a/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define MAX_PCPU_NUM 4U -#define MAX_PLATFORM_CLOS_NUM 4U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U - -#define ROOTFS_0 "root=/dev/sda3 " -#define ROOTFS_1 "root=/dev/mmcblk0p3 " - -#define SOS_ROOTFS ROOTFS_1 -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#ifndef CONFIG_RELEASE -#define BOOTARG_DEBUG "hvlog=2M@0xe00000 " \ - "memmap=0x600000$0xa00000 " \ - "ramoops.mem_address=0xa00000 " \ - "ramoops.mem_size=0x400000 " \ - "ramoops.console_size=0x200000 " \ - "reboot_panic=p,w " -#else -#define BOOTARG_DEBUG "" -#endif - -#define SOS_BOOTARGS_DIFF BOOTARG_DEBUG \ - "module_blacklist=dwc3_pci " \ - "i915.enable_guc=0x02 " \ - "cma=64M@0- " - -#define MAX_HIDDEN_PDEVS_NUM 1U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL - - -#endif /* MISC_CFG_H */ diff --git a/hypervisor/arch/x86/configs/apl-up2/pci_devices.h b/hypervisor/arch/x86/configs/apl-up2/pci_devices.h deleted file mode 100644 index 9cd982c42..000000000 --- a/hypervisor/arch/x86/configs/apl-up2/pci_devices.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define PTDEV_HI_MMIO_SIZE 0UL - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U}, \ - .vbar_base[0] = 0x91514000UL, \ - .vbar_base[1] = 0x91539000UL, \ - .vbar_base[5] = 0x91538000UL - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U}, \ - .vbar_base[0] = 0x91500000UL - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[2] = 0x91404000UL, \ - .vbar_base[4] = 0x91400000UL - -#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[2] = 0x91304000UL, \ - .vbar_base[4] = 0x91300000UL - -#endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/dnv-cb2.config b/hypervisor/arch/x86/configs/dnv-cb2.config deleted file mode 100644 index 8b3ea4b4c..000000000 --- a/hypervisor/arch/x86/configs/dnv-cb2.config +++ /dev/null @@ -1,5 +0,0 @@ -# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) -CONFIG_BOARD="dnv-cb2" -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x1000 -CONFIG_RDT_ENABLED=n diff --git a/hypervisor/arch/x86/configs/dnv-cb2/board.c b/hypervisor/arch/x86/configs/dnv-cb2/board.c deleted file mode 100644 index 42db3cb2c..000000000 --- a/hypervisor/arch/x86/configs/dnv-cb2/board.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - -#ifndef CONFIG_ACPI_PARSE_ENABLED -#error "DMAR info is not available, please set ACPI_PARSE_ENABLED to y in Kconfig. \ - Or use acrn-config tool to generate platform DMAR info." -#endif - -struct dmar_info plat_dmar_info; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM]; -#endif - -const struct cpu_state_table board_cpu_state_tbl; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h b/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h deleted file mode 100644 index bbdb0ab6a..000000000 --- a/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define MAX_PCPU_NUM 8U -#define MAX_PLATFORM_CLOS_NUM 0U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U - -#define ROOTFS_0 "root=/dev/sda3 " - -#define SOS_ROOTFS ROOTFS_0 -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#ifndef CONFIG_RELEASE -#define SOS_BOOTARGS_DIFF "hvlog=2M@0xE00000 memmap=0x200000$0xE00000 " -#else -#define SOS_BOOTARGS_DIFF "" -#endif - -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL - - -#endif /* MISC_CFG_H */ diff --git a/hypervisor/arch/x86/configs/dnv-cb2/pci_devices.h b/hypervisor/arch/x86/configs/dnv-cb2/pci_devices.h deleted file mode 100644 index 975e93e15..000000000 --- a/hypervisor/arch/x86/configs/dnv-cb2/pci_devices.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define PTDEV_HI_MMIO_SIZE 0UL - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U} -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U} -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U} -#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x01U} - -#endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/generic.config b/hypervisor/arch/x86/configs/generic.config deleted file mode 100644 index 5824a4ace..000000000 --- a/hypervisor/arch/x86/configs/generic.config +++ /dev/null @@ -1,4 +0,0 @@ -# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) -CONFIG_BOARD="generic" -CONFIG_SERIAL_LEGACY=y -CONFIG_RDT_ENABLED=n diff --git a/hypervisor/arch/x86/configs/generic/board.c b/hypervisor/arch/x86/configs/generic/board.c deleted file mode 100644 index 42db3cb2c..000000000 --- a/hypervisor/arch/x86/configs/generic/board.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - -#ifndef CONFIG_ACPI_PARSE_ENABLED -#error "DMAR info is not available, please set ACPI_PARSE_ENABLED to y in Kconfig. \ - Or use acrn-config tool to generate platform DMAR info." -#endif - -struct dmar_info plat_dmar_info; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM]; -#endif - -const struct cpu_state_table board_cpu_state_tbl; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/hypervisor/arch/x86/configs/generic/misc_cfg.h b/hypervisor/arch/x86/configs/generic/misc_cfg.h deleted file mode 100644 index c366d91b0..000000000 --- a/hypervisor/arch/x86/configs/generic/misc_cfg.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define MAX_PCPU_NUM 4U -#define MAX_PLATFORM_CLOS_NUM 0U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U - -#define ROOTFS_0 "root=/dev/sda3 " -#define ROOTFS_1 "root=/dev/mmcblk0p1 " - -#define SOS_ROOTFS ROOTFS_0 -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#ifndef CONFIG_RELEASE -#define SOS_BOOTARGS_DIFF "hvlog=2M@0xE00000 memmap=0x200000$0xE00000 " -#else -#define SOS_BOOTARGS_DIFF "" -#endif - -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL - - -#endif /* MISC_CFG_H */ diff --git a/hypervisor/arch/x86/configs/generic/pci_devices.h b/hypervisor/arch/x86/configs/generic/pci_devices.h deleted file mode 100644 index 74ba04f0a..000000000 --- a/hypervisor/arch/x86/configs/generic/pci_devices.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define PTDEV_HI_MMIO_SIZE 0UL - -#endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/icl-rvp.config b/hypervisor/arch/x86/configs/icl-rvp.config deleted file mode 100644 index e84ba7202..000000000 --- a/hypervisor/arch/x86/configs/icl-rvp.config +++ /dev/null @@ -1,6 +0,0 @@ -# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) -CONFIG_BOARD="icl-rvp" -CONFIG_SERIAL_LEGACY=y -CONFIG_SOS_RAM_SIZE=0x600000000 -CONFIG_UOS_RAM_SIZE=0x600000000 -CONFIG_RDT_ENABLED=n diff --git a/hypervisor/arch/x86/configs/icl-rvp/board.c b/hypervisor/arch/x86/configs/icl-rvp/board.c deleted file mode 100644 index 42db3cb2c..000000000 --- a/hypervisor/arch/x86/configs/icl-rvp/board.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - -#ifndef CONFIG_ACPI_PARSE_ENABLED -#error "DMAR info is not available, please set ACPI_PARSE_ENABLED to y in Kconfig. \ - Or use acrn-config tool to generate platform DMAR info." -#endif - -struct dmar_info plat_dmar_info; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM]; -#endif - -const struct cpu_state_table board_cpu_state_tbl; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/hypervisor/arch/x86/configs/kbl-nuc-i7 b/hypervisor/arch/x86/configs/kbl-nuc-i7 deleted file mode 120000 index 02b8e5c69..000000000 --- a/hypervisor/arch/x86/configs/kbl-nuc-i7 +++ /dev/null @@ -1 +0,0 @@ -nuc7i7dnb \ No newline at end of file diff --git a/hypervisor/arch/x86/configs/kbl-nuc-i7.config b/hypervisor/arch/x86/configs/kbl-nuc-i7.config deleted file mode 120000 index f772208b7..000000000 --- a/hypervisor/arch/x86/configs/kbl-nuc-i7.config +++ /dev/null @@ -1 +0,0 @@ -nuc7i7dnb.config \ No newline at end of file diff --git a/hypervisor/arch/x86/configs/nuc6cayh.config b/hypervisor/arch/x86/configs/nuc6cayh.config deleted file mode 100644 index 6ce5c84e5..000000000 --- a/hypervisor/arch/x86/configs/nuc6cayh.config +++ /dev/null @@ -1,8 +0,0 @@ -# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) -CONFIG_BOARD="nuc6cayh" -# There is no ready-made serial connector on NUC6CAYH, but developer could -# enable HSUART at PCI 0:18.0 by soldering Tx/Rx wires from M.2 connector; -CONFIG_SERIAL_PCI=y -CONFIG_SERIAL_PCI_BDF="0:18.0" -CONFIG_HV_RAM_START=0x20000000 -CONFIG_RDT_ENABLED=n diff --git a/hypervisor/arch/x86/configs/nuc6cayh/board.c b/hypervisor/arch/x86/configs/nuc6cayh/board.c deleted file mode 100644 index 42db3cb2c..000000000 --- a/hypervisor/arch/x86/configs/nuc6cayh/board.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - -#ifndef CONFIG_ACPI_PARSE_ENABLED -#error "DMAR info is not available, please set ACPI_PARSE_ENABLED to y in Kconfig. \ - Or use acrn-config tool to generate platform DMAR info." -#endif - -struct dmar_info plat_dmar_info; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM]; -#endif - -const struct cpu_state_table board_cpu_state_tbl; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h b/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h deleted file mode 100644 index 7333e93c3..000000000 --- a/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define MAX_PCPU_NUM 4U -#define MAX_PLATFORM_CLOS_NUM 0U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U - -#define ROOTFS_0 "root=/dev/sda3 " - -#define SOS_ROOTFS ROOTFS_0 -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#ifndef CONFIG_RELEASE -#define SOS_BOOTARGS_DIFF "hvlog=2M@0xE00000 memmap=0x200000$0xE00000 " -#else -#define SOS_BOOTARGS_DIFF "" -#endif - -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL - - -#endif /* MISC_CFG_H */ diff --git a/hypervisor/arch/x86/configs/nuc6cayh/pci_devices.h b/hypervisor/arch/x86/configs/nuc6cayh/pci_devices.h deleted file mode 100644 index 76ec20f49..000000000 --- a/hypervisor/arch/x86/configs/nuc6cayh/pci_devices.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define PTDEV_HI_MMIO_SIZE 0UL - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U}, \ - .vbar_base[0] = 0x91414000UL, \ - .vbar_base[1] = 0x91424000UL, \ - .vbar_base[5] = 0x91423000UL - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U}, \ - .vbar_base[0] = 0x91400000UL - -#define NETWORK_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[0] = 0x91200000UL - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[2] = 0x91104000UL, \ - .vbar_base[4] = 0x91100000UL - -#endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/platform_acpi_info.h b/hypervisor/arch/x86/configs/platform_acpi_info.h deleted file mode 100644 index cc36dbac4..000000000 --- a/hypervisor/arch/x86/configs/platform_acpi_info.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2018 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* This is a template header file for generic platform ACPI info definition, - * we should use acrn-config tool to generate board specific acpi info file - * which named as $(CONFIG_BOARD)_acpi_info.h and put it under - * hypervisor/arch/x86/configs/$(CONFIG_BOARD)/. - */ -#ifndef PLATFORM_ACPI_INFO_H -#define PLATFORM_ACPI_INFO_H - -/* pm sstate data */ -#define PM1A_EVT_ACCESS_SIZE 0U -#define PM1A_EVT_ADDRESS 0UL -#define PM1A_CNT_ADDRESS 0UL - -#define WAKE_VECTOR_32 0UL -#define WAKE_VECTOR_64 0UL - -#define RESET_REGISTER_ADDRESS 0UL -#define RESET_REGISTER_VALUE 0UL -#define RESET_REGISTER_SPACE_ID 0UL - -/* PCI mmcfg base of MCFG, pre-assumption is platform only has one PCI segment group */ -#define DEFAULT_PCI_MMCFG_BASE 0xE0000000UL - -/* DRHD of DMAR */ -#define DRHD_COUNT 8U - -#endif /* PLATFORM_ACPI_INFO_H */ diff --git a/hypervisor/arch/x86/configs/whl-ipc-i5.config b/hypervisor/arch/x86/configs/whl-ipc-i5.config deleted file mode 100644 index c4dd956a5..000000000 --- a/hypervisor/arch/x86/configs/whl-ipc-i5.config +++ /dev/null @@ -1,9 +0,0 @@ - -# New board kconfig generated by vm config tool -# Modified by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) - -CONFIG_BOARD="whl-ipc-i5" -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_HV_RAM_START=0x11000000 -CONFIG_RDT_ENABLED=n diff --git a/hypervisor/arch/x86/configs/whl-ipc-i5/board.c b/hypervisor/arch/x86/configs/whl-ipc-i5/board.c deleted file mode 100644 index 10729c008..000000000 --- a/hypervisor/arch/x86/configs/whl-ipc-i5/board.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -#include -#include -#include -#include -static struct dmar_dev_scope drhd0_dev_scope[DRHD0_DEV_CNT] = { - { - .type = DRHD0_DEVSCOPE0_TYPE, - .id = DRHD0_DEVSCOPE0_ID, - .bus = DRHD0_DEVSCOPE0_BUS, - .devfun = DRHD0_DEVSCOPE0_PATH, - }, -}; - -static struct dmar_dev_scope drhd1_dev_scope[DRHD1_DEV_CNT] = { - { - .type = DRHD1_DEVSCOPE0_TYPE, - .id = DRHD1_DEVSCOPE0_ID, - .bus = DRHD1_DEVSCOPE0_BUS, - .devfun = DRHD1_DEVSCOPE0_PATH, - }, - { - .type = DRHD1_DEVSCOPE1_TYPE, - .id = DRHD1_DEVSCOPE1_ID, - .bus = DRHD1_DEVSCOPE1_BUS, - .devfun = DRHD1_DEVSCOPE1_PATH, - }, -}; - -static struct dmar_drhd drhd_info_array[DRHD_COUNT] = { - { - .dev_cnt = DRHD0_DEV_CNT, - .segment = DRHD0_SEGMENT, - .flags = DRHD0_FLAGS, - .reg_base_addr = DRHD0_REG_BASE, - .ignore = DRHD0_IGNORE, - .devices = drhd0_dev_scope - }, - { - .dev_cnt = DRHD1_DEV_CNT, - .segment = DRHD1_SEGMENT, - .flags = DRHD1_FLAGS, - .reg_base_addr = DRHD1_REG_BASE, - .ignore = DRHD1_IGNORE, - .devices = drhd1_dev_scope - }, -}; - -struct dmar_info plat_dmar_info = { - .drhd_count = DRHD_COUNT, - .drhd_units = drhd_info_array, -}; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM]; -struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM]; -#endif - -static const struct cpu_cx_data board_cpu_cx[3] = { - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x33UL}, 0x02U, 0x97U, 0x00U}, /* C2 */ - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x60UL}, 0x03U, 0x40AU, 0x00U}, /* C3 */ -}; - -static const struct cpu_px_data board_cpu_px[6] = { - {0xBB9UL, 0x00UL, 0x0AUL, 0x0AUL, 0x002700UL, 0x002700UL}, /* P0 */ - {0xBB8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001E00UL, 0x001E00UL}, /* P1 */ - {0x708UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001200UL, 0x001200UL}, /* P2 */ - {0x640UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001000UL, 0x001000UL}, /* P3 */ - {0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P4 */ - {0x3E8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000A00UL, 0x000A00UL}, /* P5 */ -}; - -const struct cpu_state_table board_cpu_state_tbl = { - "Intel(R) Core(TM) i5-8265U CPU @ 1.60GHz", - {(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px, - (uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx} -}; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/hypervisor/arch/x86/configs/whl-ipc-i5/misc_cfg.h b/hypervisor/arch/x86/configs/whl-ipc-i5/misc_cfg.h deleted file mode 100644 index 19cf1e9ea..000000000 --- a/hypervisor/arch/x86/configs/whl-ipc-i5/misc_cfg.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define MAX_PCPU_NUM 4U -#define MAX_PLATFORM_CLOS_NUM 0U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U - -#define ROOTFS_0 "root=/dev/nvme0n1p3 " -#define ROOTFS_1 "root=/dev/sda3 " - -#define SOS_ROOTFS ROOTFS_1 -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#ifndef CONFIG_RELEASE -#define SOS_BOOTARGS_DIFF "hvlog=2M@0xE00000 memmap=0x200000$0xE00000 " -#else -#define SOS_BOOTARGS_DIFF "" -#endif - -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#endif /* MISC_CFG_H */ diff --git a/hypervisor/arch/x86/configs/whl-ipc-i5/pci_devices.h b/hypervisor/arch/x86/configs/whl-ipc-i5/pci_devices.h deleted file mode 100644 index 2ed946e45..000000000 --- a/hypervisor/arch/x86/configs/whl-ipc-i5/pci_devices.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define PTDEV_HI_MMIO_SIZE 0UL - -#define VGA_COMPATIBLE_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, \ - .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL -#define SIGNAL_PROCESSING_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U}, \ - .vbar_base[0] = 0xa141e000UL -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U}, \ - .vbar_base[0] = 0xa1400000UL -#define RAM_MEMORY_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U}, \ - .vbar_base[0] = 0xa1416000UL, \ - .vbar_base[2] = 0xa141d000UL -#define COMMUNICATION_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U}, \ - .vbar_base[0] = 0xa141c000UL -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U}, \ - .vbar_base[0] = 0xa1414000UL, \ - .vbar_base[1] = 0xa141b000UL, \ - .vbar_base[5] = 0xa141a000UL -#define SD_HOST_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1AU, .f = 0x00U}, \ - .vbar_base[0] = 0xa1419000UL -#define PCI_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U} -#define PCI_BRIDGE_1 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x04U} -#define PCI_BRIDGE_2 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x00U} -#define PCI_BRIDGE_3 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x01U} -#define ISA_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U} -#define AUDIO_DEVICE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U}, \ - .vbar_base[0] = 0xa1410000UL, \ - .vbar_base[4] = 0xa1000000UL -#define SMBUS_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U}, \ - .vbar_base[0] = 0xa1418000UL -#define SERIAL_BUS_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x05U}, \ - .vbar_base[0] = 0xfe010000UL -#define NON_VOLATILE_MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[0] = 0xa1300000UL -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1220000UL -#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x04U, .d = 0x00U, .f = 0x00U}, \ - .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1120000UL - -#endif /* PCI_DEVICES_H_ */ diff --git a/hypervisor/arch/x86/configs/whl-ipc-i5/platform_acpi_info.h b/hypervisor/arch/x86/configs/whl-ipc-i5/platform_acpi_info.h deleted file mode 100644 index 3b9080db2..000000000 --- a/hypervisor/arch/x86/configs/whl-ipc-i5/platform_acpi_info.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (C) 2019 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* DO NOT MODIFY THIS FILE UNLESS YOU KNOW WHAT YOU ARE DOING! - */ - -#ifndef PLATFORM_ACPI_INFO_H -#define PLATFORM_ACPI_INFO_H - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -/* pm sstate data */ -#define PM1A_EVT_ADDRESS 0x1800UL -#define PM1A_EVT_ACCESS_SIZE 0x2U -#define PM1A_CNT_ADDRESS 0x1804UL - -/* S3 is not supported by BIOS */ -#undef S3_PKG_VAL_PM1A -#define S3_PKG_VAL_PM1A 0x0U - -#define WAKE_VECTOR_32 0x8C8AA08CUL -#define WAKE_VECTOR_64 0x8C8AA098UL - -#define RESET_REGISTER_ADDRESS 0xCF9UL -#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO -#define RESET_REGISTER_VALUE 0x6U - -/* DRHD of DMAR */ -#define DRHD_COUNT 2U - -#define DRHD0_DEV_CNT 0x1U -#define DRHD0_SEGMENT 0x0U -#define DRHD0_FLAGS 0x0U -#define DRHD0_REG_BASE 0xFED90000UL -#define DRHD0_IGNORE true -#define DRHD0_DEVSCOPE0_TYPE 0x1U -#define DRHD0_DEVSCOPE0_ID 0x0U -#define DRHD0_DEVSCOPE0_BUS 0x0U -#define DRHD0_DEVSCOPE0_PATH 0x10U - -#define DRHD1_DEV_CNT 0x2U -#define DRHD1_SEGMENT 0x0U -#define DRHD1_FLAGS 0x1U -#define DRHD1_REG_BASE 0xFED91000UL -#define DRHD1_IGNORE false -#define DRHD1_DEVSCOPE0_TYPE 0x3U -#define DRHD1_DEVSCOPE0_ID 0x2U -#define DRHD1_DEVSCOPE0_BUS 0x0U -#define DRHD1_DEVSCOPE0_PATH 0xf7U -#define DRHD1_DEVSCOPE1_TYPE 0x4U -#define DRHD1_DEVSCOPE1_ID 0x0U -#define DRHD1_DEVSCOPE1_BUS 0x0U -#define DRHD1_DEVSCOPE1_PATH 0xf6U - -/* PCI mmcfg base of MCFG */ -#define DEFAULT_PCI_MMCFG_BASE 0xe0000000UL - -#endif /* PLATFORM_ACPI_INFO_H */