From 6372548e1185b1b3c7ad8e40d7c08a86b8fa2d56 Mon Sep 17 00:00:00 2001
From: Mingqiang Chi <mingqiang.chi@intel.com>
Date: Thu, 17 Jan 2019 09:40:13 +0800
Subject: [PATCH] hv:Fix violation "Cyclomatic complexity greater than 20" in
 instr_emul.c

Split decode_prefixes() to 2 small APIs

v1-->v2:
    split decode_prefixes to 2 APIs

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
---
 hypervisor/arch/x86/guest/instr_emul.c | 56 ++++++++++++++------------
 1 file changed, 30 insertions(+), 26 deletions(-)

diff --git a/hypervisor/arch/x86/guest/instr_emul.c b/hypervisor/arch/x86/guest/instr_emul.c
index 485ab3bbb..08ef348f5 100644
--- a/hypervisor/arch/x86/guest/instr_emul.c
+++ b/hypervisor/arch/x86/guest/instr_emul.c
@@ -1698,6 +1698,35 @@ static bool segment_override(uint8_t x, enum cpu_reg_name *seg)
 	return override;
 }
 
+static void decode_op_and_addr_size(struct instr_emul_vie *vie, enum vm_cpu_mode cpu_mode, bool cs_d)
+{
+	/*
+	 * Section "Operand-Size And Address-Size Attributes", Intel SDM, Vol 1
+	 */
+	if (cpu_mode == CPU_MODE_64BIT) {
+		/*
+		 * Default address size is 64-bits and default operand size
+		 * is 32-bits.
+		 */
+		vie->addrsize = ((vie->addrsize_override != 0U) ? 4U : 8U);
+		if (vie->rex_w != 0U) {
+			vie->opsize = 8U;
+		} else if (vie->opsize_override != 0U) {
+			vie->opsize = 2U;
+		} else {
+			vie->opsize = 4U;
+		}
+	} else if (cs_d) {
+		/* Default address and operand sizes are 32-bits */
+		vie->addrsize = ((vie->addrsize_override != 0U) ? 2U : 4U);
+		vie->opsize = ((vie->opsize_override != 0U) ? 2U : 4U);
+	} else {
+		/* Default address and operand sizes are 16-bits */
+		vie->addrsize = ((vie->addrsize_override != 0U) ? 4U : 2U);
+		vie->opsize = ((vie->opsize_override != 0U) ? 4U : 2U);
+	}
+
+}
 static int32_t decode_prefixes(struct instr_emul_vie *vie, enum vm_cpu_mode cpu_mode, bool cs_d)
 {
 	uint8_t x, i;
@@ -1743,32 +1772,7 @@ static int32_t decode_prefixes(struct instr_emul_vie *vie, enum vm_cpu_mode cpu_
 			vie->rex_b = (x >> 0x0U) & 1U;
 			vie_advance(vie);
 		}
-
-		/*
-		 * Section "Operand-Size And Address-Size Attributes", Intel SDM, Vol 1
-		 */
-		if (cpu_mode == CPU_MODE_64BIT) {
-			/*
-			 * Default address size is 64-bits and default operand size
-			 * is 32-bits.
-			 */
-			vie->addrsize = (vie->addrsize_override != 0U)? 4U : 8U;
-			if (vie->rex_w != 0U) {
-				vie->opsize = 8U;
-			} else if (vie->opsize_override != 0U) {
-				vie->opsize = 2U;
-			} else {
-				vie->opsize = 4U;
-			}
-		} else if (cs_d) {
-			/* Default address and operand sizes are 32-bits */
-			vie->addrsize = vie->addrsize_override != 0U ? 2U : 4U;
-			vie->opsize = vie->opsize_override != 0U ? 2U : 4U;
-		} else {
-			/* Default address and operand sizes are 16-bits */
-			vie->addrsize = vie->addrsize_override != 0U ? 4U : 2U;
-			vie->opsize = vie->opsize_override != 0U ? 4U : 2U;
-		}
+		decode_op_and_addr_size(vie, cpu_mode, cs_d);
 	}
 
 	return ret;