From 65454730de46c69cdf88abcab3e90a950ee788e3 Mon Sep 17 00:00:00 2001 From: Fei Li Date: Wed, 19 Oct 2022 11:05:01 +0800 Subject: [PATCH] hv:io: wrap mmio read/write When guest traps and wants to access a mmio region, the ACRN hypervisor doesn't know the mmio size the guest wants to access until the trap happens. In this case, ACRN should switch the mmio size and then call mmio_read8/16/32/64 or mmio_write8/16/32/64 in each trap place. This patch wrap the mmio read/write with a parameter to assign the mmio size. Tracked-On: #8255 Signed-off-by: Fei Li --- hypervisor/include/arch/x86/asm/io.h | 38 ++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/hypervisor/include/arch/x86/asm/io.h b/hypervisor/include/arch/x86/asm/io.h index d8a80f59f..42bf87bf3 100644 --- a/hypervisor/include/arch/x86/asm/io.h +++ b/hypervisor/include/arch/x86/asm/io.h @@ -166,4 +166,42 @@ static inline uint8_t mmio_read8(const void *addr) return *((volatile const uint8_t *)addr); } +static inline uint64_t mmio_read(const void *addr, uint64_t sz) +{ + uint64_t val; + switch (sz) { + case 1U: + val = (uint64_t)mmio_read8(addr); + break; + case 2U: + val = (uint64_t)mmio_read16(addr); + break; + case 4U: + val = (uint64_t)mmio_read32(addr); + break; + default: + val = mmio_read64(addr); + break; + } + return val; +} + +static inline void mmio_write(void *addr, uint64_t sz, uint64_t val) +{ + switch (sz) { + case 1U: + mmio_write8((uint8_t)val, addr); + break; + case 2U: + mmio_write16((uint16_t)val, addr); + break; + case 4U: + mmio_write32((uint32_t)val, addr); + break; + default: + mmio_write64(val, addr); + break; + } +} + #endif /* _IO_H defined */