diff --git a/misc/acrn-config/xmls/board-xmls/tgl-rvp.xml b/misc/acrn-config/xmls/board-xmls/tgl-rvp.xml new file mode 100644 index 000000000..ed51b16ab --- /dev/null +++ b/misc/acrn-config/xmls/board-xmls/tgl-rvp.xml @@ -0,0 +1,283 @@ + + + BIOS Information + Vendor: Intel Corporation + Version: TGLSFWI1.R00.2321.A08.1909162051 + Release Date: 09/16/2019 + + + + Base Board Information + Manufacturer: Intel Corporation + Product Name: TigerLake U DDR4 SODIMM RVP + Version: 1 + + + + 00:00.0 Host bridge: Intel Corporation Device 9a14 + 00:02.0 VGA compatible controller: Intel Corporation Device 9a49 + Region 0: Memory at ab000000 (64-bit, non-prefetchable) [size=16M] + Region 2: Memory at 80000000 (64-bit, prefetchable) [size=256M] + Region 0: Memory at 00000000ad000000 (64-bit, non-prefetchable) + Region 2: Memory at 0000000000000000 (64-bit, prefetchable) + 00:04.0 Signal processing controller: Intel Corporation Device 9a03 + Region 0: Memory at ac280000 (64-bit, non-prefetchable) [disabled] [size=128K] + 00:07.0 PCI bridge: Intel Corporation Device 9a23 + 00:07.1 PCI bridge: Intel Corporation Device 9a25 + 00:07.2 PCI bridge: Intel Corporation Device 9a27 + 00:07.3 PCI bridge: Intel Corporation Device 9a29 + 00:08.0 System peripheral: Intel Corporation Device 9a11 + Region 0: Memory at ac300000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:0a.0 Signal processing controller: Intel Corporation Device 9a0d (rev 01) + Region 0: Memory at ac2f0000 (64-bit, non-prefetchable) [size=32K] + 00:0d.0 USB controller: Intel Corporation Device 9a13 + Region 0: Memory at ac2c0000 (64-bit, non-prefetchable) [size=64K] + 00:0d.2 System peripheral: Intel Corporation Device 9a1b + Region 0: Memory at ac200000 (64-bit, non-prefetchable) [size=256K] + Region 2: Memory at ac301000 (64-bit, non-prefetchable) [size=4K] + 00:0d.3 System peripheral: Intel Corporation Device 9a1d + Region 0: Memory at ac240000 (64-bit, non-prefetchable) [size=256K] + Region 2: Memory at ac302000 (64-bit, non-prefetchable) [size=4K] + 00:12.0 Serial controller: Intel Corporation Device a0fc + Region 0: Memory at ac2d0000 (64-bit, non-prefetchable) [size=64K] + 00:14.0 USB controller: Intel Corporation Device a0ed + Region 0: Memory at ac2e0000 (64-bit, non-prefetchable) [size=64K] + 00:14.2 RAM memory: Intel Corporation Device a0ef + Region 0: Memory at ac2f8000 (64-bit, non-prefetchable) [disabled] [size=16K] + Region 2: Memory at ac303000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:15.0 Serial bus controller [0c80]: Intel Corporation Device a0e8 + Region 0: Memory at 3f400000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:15.1 Serial bus controller [0c80]: Intel Corporation Device a0e9 + Region 0: Memory at 3f401000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:15.2 Serial bus controller [0c80]: Intel Corporation Device a0ea + Region 0: Memory at 3f402000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:15.3 Serial bus controller [0c80]: Intel Corporation Device a0eb + Region 0: Memory at 3f403000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:16.0 Communication controller: Intel Corporation Device a0e0 + Region 0: Memory at ac308000 (64-bit, non-prefetchable) [size=4K] + 00:19.0 Serial bus controller [0c80]: Intel Corporation Device a0c5 + Region 0: Memory at 3f404000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:19.1 Serial bus controller [0c80]: Intel Corporation Device a0c6 + Region 0: Memory at 3f405000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:1d.0 PCI bridge: Intel Corporation Device a0b0 + 00:1e.0 Communication controller: Intel Corporation Device a0a8 + Region 0: Memory at 3f406000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:1e.3 Serial bus controller [0c80]: Intel Corporation Device a0ab + Region 0: Memory at 3f407000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:1f.0 ISA bridge: Intel Corporation Device a082 + 00:1f.3 Multimedia audio controller: Intel Corporation Device a0c8 + Region 0: Memory at ac2fc000 (64-bit, non-prefetchable) [disabled] [size=16K] + Region 4: Memory at ac000000 (64-bit, non-prefetchable) [disabled] [size=1M] + 00:1f.4 SMBus: Intel Corporation Device a0a3 + Region 0: Memory at ac30d000 (64-bit, non-prefetchable) [disabled] [size=256] + 00:1f.5 Serial bus controller [0c80]: Intel Corporation Device a0a4 + Region 0: Memory at 3f408000 (32-bit, non-prefetchable) [size=4K] + 00:1f.6 Ethernet controller: Intel Corporation Device 15fc + Region 0: Memory at ac2a0000 (32-bit, non-prefetchable) [disabled] [size=128K] + ad:00.0 Non-Volatile memory controller: Intel Corporation Device f1a8 (rev 03) + Region 0: Memory at ac100000 (64-bit, non-prefetchable) [size=16K] + + + + 00:00.0 0600: 8086:9a14 + 00:02.0 0300: 8086:9a49 + 00:04.0 1180: 8086:9a03 + 00:07.0 0604: 8086:9a23 + 00:07.1 0604: 8086:9a25 + 00:07.2 0604: 8086:9a27 + 00:07.3 0604: 8086:9a29 + 00:08.0 0880: 8086:9a11 + 00:0a.0 1180: 8086:9a0d (rev 01) + 00:0d.0 0c03: 8086:9a13 + 00:0d.2 0880: 8086:9a1b + 00:0d.3 0880: 8086:9a1d + 00:12.0 0700: 8086:a0fc + 00:14.0 0c03: 8086:a0ed + 00:14.2 0500: 8086:a0ef + 00:15.0 0c80: 8086:a0e8 + 00:15.1 0c80: 8086:a0e9 + 00:15.2 0c80: 8086:a0ea + 00:15.3 0c80: 8086:a0eb + 00:16.0 0780: 8086:a0e0 + 00:19.0 0c80: 8086:a0c5 + 00:19.1 0c80: 8086:a0c6 + 00:1d.0 0604: 8086:a0b0 + 00:1e.0 0780: 8086:a0a8 + 00:1e.3 0c80: 8086:a0ab + 00:1f.0 0601: 8086:a082 + 00:1f.3 0401: 8086:a0c8 + 00:1f.4 0c05: 8086:a0a3 + 00:1f.5 0c80: 8086:a0a4 + 00:1f.6 0200: 8086:15fc + ad:00.0 0108: 8086:f1a8 (rev 03) + + + + #define WAKE_VECTOR_32 0x3498700CUL + #define WAKE_VECTOR_64 0x34987018UL + + + + #define RESET_REGISTER_ADDRESS 0xCF9UL + #define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO + #define RESET_REGISTER_VALUE 0x6U + + + + #define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO + #define PM1A_EVT_BIT_WIDTH 0x20U + #define PM1A_EVT_BIT_OFFSET 0x0U + #define PM1A_EVT_ADDRESS 0x1800UL + #define PM1A_EVT_ACCESS_SIZE 0x2U + #define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO + #define PM1B_EVT_BIT_WIDTH 0x0U + #define PM1B_EVT_BIT_OFFSET 0x0U + #define PM1B_EVT_ADDRESS 0x0UL + #define PM1B_EVT_ACCESS_SIZE 0x2U + #define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO + #define PM1A_CNT_BIT_WIDTH 0x10U + #define PM1A_CNT_BIT_OFFSET 0x0U + #define PM1A_CNT_ADDRESS 0x1804UL + #define PM1A_CNT_ACCESS_SIZE 0x2U + #define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO + #define PM1B_CNT_BIT_WIDTH 0x0U + #define PM1B_CNT_BIT_OFFSET 0x0U + #define PM1B_CNT_ADDRESS 0x0UL + #define PM1B_CNT_ACCESS_SIZE 0x2U + + + + #define S3_PKG_VAL_PM1A 0x5U + #define S3_PKG_VAL_PM1B 0U + #define S3_PKG_RESERVED 0x0U + + + + #define S5_PKG_VAL_PM1A 0x7U + #define S5_PKG_VAL_PM1B 0U + #define S5_PKG_RESERVED 0x0U + + + + #define DRHD_COUNT 6U + + #define DRHD0_DEV_CNT 0x1U + #define DRHD0_SEGMENT 0x0U + #define DRHD0_FLAGS 0x0U + #define DRHD0_REG_BASE 0xFED90000UL + #define DRHD0_IGNORE true + #define DRHD0_DEVSCOPE0_TYPE 0x1U + #define DRHD0_DEVSCOPE0_ID 0x0U + #define DRHD0_DEVSCOPE0_BUS 0x0U + #define DRHD0_DEVSCOPE0_PATH 0x10U + + #define DRHD1_DEV_CNT 0x1U + #define DRHD1_SEGMENT 0x0U + #define DRHD1_FLAGS 0x0U + #define DRHD1_REG_BASE 0xFED84000UL + #define DRHD1_IGNORE false + #define DRHD1_DEVSCOPE0_TYPE 0x2U + #define DRHD1_DEVSCOPE0_ID 0x0U + #define DRHD1_DEVSCOPE0_BUS 0x0U + #define DRHD1_DEVSCOPE0_PATH 0x38U + + #define DRHD2_DEV_CNT 0x1U + #define DRHD2_SEGMENT 0x0U + #define DRHD2_FLAGS 0x0U + #define DRHD2_REG_BASE 0xFED85000UL + #define DRHD2_IGNORE false + #define DRHD2_DEVSCOPE0_TYPE 0x2U + #define DRHD2_DEVSCOPE0_ID 0x0U + #define DRHD2_DEVSCOPE0_BUS 0x0U + #define DRHD2_DEVSCOPE0_PATH 0x39U + + #define DRHD3_DEV_CNT 0x1U + #define DRHD3_SEGMENT 0x0U + #define DRHD3_FLAGS 0x0U + #define DRHD3_REG_BASE 0xFED86000UL + #define DRHD3_IGNORE false + #define DRHD3_DEVSCOPE0_TYPE 0x2U + #define DRHD3_DEVSCOPE0_ID 0x0U + #define DRHD3_DEVSCOPE0_BUS 0x0U + #define DRHD3_DEVSCOPE0_PATH 0x3aU + + #define DRHD4_DEV_CNT 0x1U + #define DRHD4_SEGMENT 0x0U + #define DRHD4_FLAGS 0x0U + #define DRHD4_REG_BASE 0xFED87000UL + #define DRHD4_IGNORE false + #define DRHD4_DEVSCOPE0_TYPE 0x2U + #define DRHD4_DEVSCOPE0_ID 0x0U + #define DRHD4_DEVSCOPE0_BUS 0x0U + #define DRHD4_DEVSCOPE0_PATH 0x3bU + + #define DRHD5_DEV_CNT 0x0U + #define DRHD5_SEGMENT 0x0U + #define DRHD5_FLAGS 0x1U + #define DRHD5_REG_BASE 0xFED91000UL + #define DRHD5_IGNORE false + + + + + "Genuine Intel(R) CPU 0000 @ 1.00GHz" + + + + {{SPACE_FFixedHW, 0x00U, 0x00U, 0x00U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ + {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1816UL}, 0x02U, 0x61U, 0x00U}, /* C2 */ + {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1819UL}, 0x03U, 0x40AU, 0x00U}, /* C3 */ + + + + {0x4B1UL, 0x00UL, 0x0AUL, 0x0AUL, 0x002400UL, 0x002400UL}, /* P0 */ + {0x4B0UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000C00UL, 0x000C00UL}, /* P1 */ + {0x44CUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000B00UL, 0x000B00UL}, /* P2 */ + {0x3E8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000A00UL, 0x000A00UL}, /* P3 */ + {0x384UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000900UL, 0x000900UL}, /* P4 */ + {0x320UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000800UL, 0x000800UL}, /* P5 */ + {0x2BCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000700UL, 0x000700UL}, /* P6 */ + {0x258UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000600UL, 0x000600UL}, /* P7 */ + {0x1F4UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000500UL, 0x000500UL}, /* P8 */ + {0x190UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000400UL, 0x000400UL}, /* P9 */ + + + + /* PCI mmcfg base of MCFG */ + #define DEFAULT_PCI_MMCFG_BASE 0xc0000000UL + + + + clos supported by cache:L2 + clos max:8 + + + + 00001000-0009efff : System RAM + 00100000-1fdfffff : System RAM + 20000000-30d48fff : System RAM + 34c4f000-34c4ffff : System RAM + 100000000-4c0bfffff : System RAM + + + + /dev/nvme0n1p3: TYPE="ext4" + + + + seri:/dev/ttyS0 type:portio base:0x3F8 irq:4 + + + + 3, 5, 6, 7, 10, 11, 12, 13, 14, 15 + + + + 16155896 kB + + + + 0, 1, 2, 3 + + + diff --git a/misc/acrn-config/xmls/config-xmls/tgl-rvp/industry.xml b/misc/acrn-config/xmls/config-xmls/tgl-rvp/industry.xml new file mode 100644 index 000000000..3ea68e849 --- /dev/null +++ b/misc/acrn-config/xmls/config-xmls/tgl-rvp/industry.xml @@ -0,0 +1,98 @@ + + + + SOS_VM + ACRN SOS VM + dbbbd434-7a57-4216-a12c-2201f1ab0240 + + + + 0 + + 0 + 0x20000000 + + + ACRN Service OS + KERNEL_BZIMAGE + Linux_bzImage + SOS_VM_BOOTARGS + + + VUART_LEGACY_PIO + SOS_COM1_BASE + SOS_COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + SOS_COM2_IRQ + 2 + 1 + + SOS_EMULATED_PCI_DEV_NUM + sos_pci_devs + + /dev/nvme0n1p3 + /dev/ttyS0 + rw rootwait console=ttyS0 consoleblank=0 no_timer_check quiet loglevel=3 + i915.nuclear_pageflip=1 i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_gvt=1 + + + + + POST_LAUNCHED_VM + d2795438-25d6-11e8-864e-cb7a18b34643 + + + + + 1 + + 0 + + 0 + 0 + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 1 + + + + POST_LAUNCHED_VM + 495ae2e5-2603-4d64-af76-d4bc5a8ec0e5 + + GUEST_FLAG_HIGHEST_SEVERITY + + + 2 + 3 + + 0 + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + COM2_BASE + COM2_IRQ + 0 + 1 + + + diff --git a/misc/acrn-config/xmls/config-xmls/tgl-rvp/industry_launch_1uos.xml b/misc/acrn-config/xmls/config-xmls/tgl-rvp/industry_launch_1uos.xml new file mode 100644 index 000000000..7b0e6f19e --- /dev/null +++ b/misc/acrn-config/xmls/config-xmls/tgl-rvp/industry_launch_1uos.xml @@ -0,0 +1,28 @@ + + + + CLEARLINUX + no + 2000 + 64 448 8 + ovmf + /dev/nvme0n1p3 + /root/uos/uos.img + com1(ttyS0) + + + + + +