hv: vpci: trap PCIe ECAM access for SOS

SOS will use PCIe ECAM access PCIe external configuration space. HV should trap this
access for security(Now pre-launched VM doesn't want to support PCI ECAM; post-launched
VM trap PCIe ECAM access in DM).
Besides, update PCIe MMCONFIG region to be owned by hypervisor and expose and pass through
platform hide PCI devices by BIOS to SOS.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
This commit is contained in:
Li Fei1
2019-12-05 22:51:06 +08:00
committed by wenlingz
parent 1e50ec8899
commit 65ed6c3529
6 changed files with 82 additions and 9 deletions

View File

@@ -70,9 +70,9 @@ struct pci_msix {
};
union pci_cfgdata {
uint8_t data_8[PCI_REGMAX + 1U];
uint16_t data_16[(PCI_REGMAX + 1U) >> 1U];
uint32_t data_32[(PCI_REGMAX + 1U) >> 2U];
uint8_t data_8[PCIE_CONFIG_SPACE_SIZE];
uint16_t data_16[PCIE_CONFIG_SPACE_SIZE >> 1U];
uint32_t data_32[PCIE_CONFIG_SPACE_SIZE >> 2U];
};
struct pci_vdev;
@@ -123,6 +123,7 @@ struct acrn_vpci {
spinlock_t lock;
struct acrn_vm *vm;
union pci_cfg_addr_reg addr;
uint64_t pci_mmcfg_base;
uint32_t pci_vdev_cnt;
struct pci_vdev pci_vdevs[CONFIG_MAX_PCI_DEV_NUM];
};