diff --git a/hypervisor/arch/x86/guest/vlapic.c b/hypervisor/arch/x86/guest/vlapic.c index 7d6430744..e95320121 100644 --- a/hypervisor/arch/x86/guest/vlapic.c +++ b/hypervisor/arch/x86/guest/vlapic.c @@ -83,9 +83,6 @@ apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector); static int32_t apicv_pending_intr(const struct acrn_vlapic *vlapic); -static void -apicv_batch_set_tmr(const struct acrn_vlapic *vlapic); - /* * Post an interrupt to the vcpu running on 'hostcpu'. This will use a * hardware assist if available (e.g. Posted Interrupt) or fall back to @@ -1866,45 +1863,6 @@ vlapic_enabled(const struct acrn_vlapic *vlapic) return ret; } -/* - * APICv batch set tmr will try to set multi vec at the same time - * to avoid unnecessary VMCS read/update. - */ -void -vlapic_apicv_batch_set_tmr(struct acrn_vlapic *vlapic) -{ - if (is_apicv_intr_delivery_supported()) { - apicv_batch_set_tmr(vlapic); - } -} - -void -vlapic_set_tmr_one_vec(struct acrn_vlapic *vlapic, uint32_t delmode, - uint32_t vector, bool level) -{ - ASSERT(vector <= NR_MAX_VECTOR, - "invalid vector %u", vector); - - /* - * A level trigger is valid only for fixed and lowprio delivery modes. - */ - if ((delmode != APIC_DELMODE_FIXED) && (delmode != APIC_DELMODE_LOWPRIO)) { - dev_dbg(ACRN_DBG_LAPIC, - "Ignoring level trigger-mode for delivery-mode %u", - delmode); - } else { - /* NOTE - * We don't check whether the vcpu is in the dest here. That means - * all vcpus of vm will do tmr update. - * - * If there is new caller to this function, need to refine this - * part of work. - */ - dev_dbg(ACRN_DBG_LAPIC, "vector %u set to level-triggered", vector); - vlapic_set_tmr(vlapic, vector, level); - } -} - /* * @pre vcpu != NULL * @pre vector <= 255U @@ -2312,31 +2270,6 @@ apicv_pending_intr(const struct acrn_vlapic *vlapic) return ret; } -/* Update the VMX_EOI_EXIT according to related tmr */ -#define EOI_STEP_LEN (64U) -#define TMR_STEP_LEN (32U) -static void -apicv_batch_set_tmr(const struct acrn_vlapic *vlapic) -{ - const struct lapic_regs *lapic = &(vlapic->apic_page); - uint64_t val; - const struct lapic_reg *ptr; - uint32_t s, e; - - ptr = &lapic->tmr[0]; - s = 0U; - e = 256U; - - while (s < e) { - val = ptr[(s / TMR_STEP_LEN) + 1].v; - val <<= TMR_STEP_LEN; - val |= ptr[s / TMR_STEP_LEN].v; - exec_vmwrite64(vmx_eoi_exit(s), val); - - s += EOI_STEP_LEN; - } -} - /** *APIC-v: Get the HPA to APIC-access page * **/ diff --git a/hypervisor/arch/x86/virq.c b/hypervisor/arch/x86/virq.c index be9337720..737e60759 100644 --- a/hypervisor/arch/x86/virq.c +++ b/hypervisor/arch/x86/virq.c @@ -405,10 +405,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu) flush_vpid_single(arch->vpid); } - if (bitmap_test_and_clear_lock(ACRN_REQUEST_TMR_UPDATE, pending_req_bits)) { - vioapic_update_tmr(vcpu); - } - if (bitmap_test_and_clear_lock(ACRN_REQUEST_EOI_EXIT_UPDATE, pending_req_bits)) { vcpu_set_vmcs_eoi_exit(vcpu); } diff --git a/hypervisor/dm/vioapic.c b/hypervisor/dm/vioapic.c index cb853cc4c..1b33429cf 100644 --- a/hypervisor/dm/vioapic.c +++ b/hypervisor/dm/vioapic.c @@ -231,44 +231,6 @@ vioapic_update_eoi_exit(const struct acrn_vioapic *vioapic) } } -/* - * Reset the vlapic's trigger-mode register to reflect the ioapic pin - * configuration. - */ -void -vioapic_update_tmr(struct acrn_vcpu *vcpu) -{ - struct acrn_vioapic *vioapic; - struct acrn_vlapic *vlapic; - union ioapic_rte rte; - uint32_t vector, delmode; - bool level; - uint32_t pin, pincount; - - vlapic = vcpu_vlapic(vcpu); - vioapic = vm_ioapic(vcpu->vm); - - spinlock_obtain(&(vioapic->mtx)); - pincount = vioapic_pincount(vcpu->vm); - for (pin = 0U; pin < pincount; pin++) { - rte = vioapic->rtbl[pin]; - - level = ((rte.full & IOAPIC_RTE_TRGRLVL) != 0UL); - - /* - * For a level-triggered 'pin' let the vlapic figure out if - * an assertion on this 'pin' would result in an interrupt - * being delivered to it. If yes, then it will modify the - * TMR bit associated with this vector to level-triggered. - */ - delmode = (uint32_t)(rte.full & IOAPIC_RTE_DELMOD); - vector = rte.u.lo_32 & IOAPIC_RTE_LOW_INTVEC; - vlapic_set_tmr_one_vec(vlapic, delmode, vector, level); - } - vlapic_apicv_batch_set_tmr(vlapic); - spinlock_release(&(vioapic->mtx)); -} - static uint32_t vioapic_indirect_read(const struct acrn_vioapic *vioapic, uint32_t addr) { diff --git a/hypervisor/include/arch/x86/guest/guest.h b/hypervisor/include/arch/x86/guest/guest.h index 051347e2c..5edcc094a 100644 --- a/hypervisor/include/arch/x86/guest/guest.h +++ b/hypervisor/include/arch/x86/guest/guest.h @@ -31,17 +31,16 @@ /* * VCPU related APIs */ -#define ACRN_REQUEST_EXCP 0U -#define ACRN_REQUEST_EVENT 1U -#define ACRN_REQUEST_EXTINT 2U -#define ACRN_REQUEST_NMI 3U -#define ACRN_REQUEST_TMR_UPDATE 4U -#define ACRN_REQUEST_EPT_FLUSH 5U -#define ACRN_REQUEST_TRP_FAULT 6U -#define ACRN_REQUEST_VPID_FLUSH 7U /* flush vpid tlb */ -#define ACRN_REQUEST_EOI_EXIT_UPDATE 8U +#define ACRN_REQUEST_EXCP 0U +#define ACRN_REQUEST_EVENT 1U +#define ACRN_REQUEST_EXTINT 2U +#define ACRN_REQUEST_NMI 3U +#define ACRN_REQUEST_EOI_EXIT_UPDATE 4U +#define ACRN_REQUEST_EPT_FLUSH 5U +#define ACRN_REQUEST_TRP_FAULT 6U +#define ACRN_REQUEST_VPID_FLUSH 7U /* flush vpid tlb */ -#define E820_MAX_ENTRIES 32U +#define E820_MAX_ENTRIES 32U #define save_segment(seg, SEG_NAME) \ { \ diff --git a/hypervisor/include/arch/x86/guest/vioapic.h b/hypervisor/include/arch/x86/guest/vioapic.h index bc5e4e766..3576aaac8 100644 --- a/hypervisor/include/arch/x86/guest/vioapic.h +++ b/hypervisor/include/arch/x86/guest/vioapic.h @@ -99,7 +99,6 @@ void vioapic_set_irqline_lock(const struct acrn_vm *vm, uint32_t irqline, uint32 * @return None */ void vioapic_set_irqline_nolock(const struct acrn_vm *vm, uint32_t irqline, uint32_t operation); -void vioapic_update_tmr(struct acrn_vcpu *vcpu); uint32_t vioapic_pincount(const struct acrn_vm *vm); void vioapic_process_eoi(struct acrn_vm *vm, uint32_t vector); diff --git a/hypervisor/include/arch/x86/guest/vlapic.h b/hypervisor/include/arch/x86/guest/vlapic.h index 675c91e31..b778973e6 100644 --- a/hypervisor/include/arch/x86/guest/vlapic.h +++ b/hypervisor/include/arch/x86/guest/vlapic.h @@ -227,15 +227,6 @@ int32_t vlapic_intr_msi(struct acrn_vm *vm, uint64_t addr, uint64_t msg); void vlapic_deliver_intr(struct acrn_vm *vm, bool level, uint32_t dest, bool phys, uint32_t delmode, uint32_t vec, bool rh); -/* - * Set the trigger-mode bit associated with 'vector' to level-triggered if - * the (dest,phys,delmode) tuple resolves to an interrupt being delivered to - * this 'vlapic'. - */ -void vlapic_set_tmr_one_vec(struct acrn_vlapic *vlapic, uint32_t delmode, - uint32_t vector, bool level); - -void vlapic_apicv_batch_set_tmr(struct acrn_vlapic *vlapic); uint32_t vlapic_get_apicid(const struct acrn_vlapic *vlapic); int32_t vlapic_create(struct acrn_vcpu *vcpu); /*