From 66c74c6df1c5e119ffc70a545010a631b40628c4 Mon Sep 17 00:00:00 2001 From: Binbin Wu Date: Thu, 7 Jun 2018 11:37:30 +0800 Subject: [PATCH] hv: adjust control register init order - Ajust the order of control registers just for more clear in logic. Will not change the guest init state after the ajustment. - Add a comment to point out the CR4 should be inited before CR0. The value of CR4 will be used during CR0 set. Signed-off-by: Binbin Wu Acked-by: Eddie Dong --- hypervisor/arch/x86/vmx.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/hypervisor/arch/x86/vmx.c b/hypervisor/arch/x86/vmx.c index 66ba26698..09a7bc01e 100644 --- a/hypervisor/arch/x86/vmx.c +++ b/hypervisor/arch/x86/vmx.c @@ -494,20 +494,22 @@ static void init_guest_state(struct vcpu *vcpu) if (vcpu_mode == CPU_MODE_64BIT) cur_context->ia32_efer = MSR_IA32_EFER_LME_BIT; - /* Setup guest control register values */ - /* Set up guest CRO field */ + /* Setup guest control register values + * cr4 should be set before cr0, because when set cr0, cr4 value will be + * checked. + */ if (vcpu_mode == CPU_MODE_REAL) { vmx_write_cr4(vcpu, 0); - vmx_write_cr0(vcpu, CR0_ET | CR0_NE); vmx_write_cr3(vcpu, 0); + vmx_write_cr0(vcpu, CR0_ET | CR0_NE); } else if (vcpu_mode == CPU_MODE_PROTECTED) { vmx_write_cr4(vcpu, 0); - vmx_write_cr0(vcpu, CR0_ET | CR0_NE | CR0_PE); vmx_write_cr3(vcpu, 0); + vmx_write_cr0(vcpu, CR0_ET | CR0_NE | CR0_PE); } else if (vcpu_mode == CPU_MODE_64BIT) { vmx_write_cr4(vcpu, CR4_PSE | CR4_PAE | CR4_MCE); - vmx_write_cr0(vcpu, CR0_PG | CR0_PE | CR0_NE); vmx_write_cr3(vcpu, vm->arch_vm.guest_init_pml4 | CR3_PWT); + vmx_write_cr0(vcpu, CR0_PG | CR0_PE | CR0_NE); } /***************************************************/